Commit b9402e3b authored by Helge Deller's avatar Helge Deller
Browse files

parisc: Check for valid stride size for cache flushes 



Report if the calculated cache stride size is zero, otherwise the cache
flushing routine will never finish and hang the machine.
This can be reproduced with a testcase in qemu, where the firmware reports
wrong cache values.

Signed-off-by: default avatarHelge Deller <deller@gmx.de>
parent 2751153b

arch/parisc/kernel/cache.c

+4 −0
Original line number Diff line number Diff line
@@ -264,6 +264,10 @@ parisc_cache_init(void) 
	icache_stride = CAFL_STRIDE(cache_info.ic_conf);

#undef CAFL_STRIDE



	/* stride needs to be non-zero, otherwise cache flushes will not work */

	WARN_ON(cache_info.dc_size && dcache_stride == 0);

	WARN_ON(cache_info.ic_size && icache_stride == 0);



	if ((boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) ==

						PDC_MODEL_NVA_UNSUPPORTED) {

		printk(KERN_WARNING "parisc_cache_init: Only equivalent aliasing supported!\n");