Unverified Commit b94e0e37 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'renesas-fixes-for-v7.1-tag1' of...

Merge tag 'renesas-fixes-for-v7.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes

Renesas fixes for v7.1

  - Fix SCIF (serial port) clocks on R-Car X5H,
  - Fix various dtc and dtbs_check warnings.

* tag 'renesas-fixes-for-v7.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel

:
  arm64: dts: renesas: r9a09g056: Add #mux-state-cells to usb20phyrst
  arm64: dts: renesas: r9a09g057: Add #mux-state-cells to usb2{0,1}phyrst
  ARM: dts: renesas: rskrza1: Drop superfluous cells
  ARM: dts: renesas: genmai: Drop superfluous cells
  ARM: dts: renesas: r7s72100: Add missing unit address to bus node
  ARM: dts: renesas: r8a7792: Add missing unit address to bus node
  ARM: dts: renesas: r8a7779: Add missing unit address to bus node
  ARM: dts: renesas: r8a7778: Add missing unit address to bus node
  arm64: dts: renesas: rz-smarc-du-adv7513-smarc: Fix missing cells and reg in DU subnode
  arm64: dts: renesas: rz-smarc-cru-csi-ov5645: Fix missing cells and reg in CSI2 subnode
  arm64: dts: renesas: salvator-panel: Fix missing cells and reg in DTO
  arm64: dts: renesas: draak/ebisu-panel: Fix missing cells and reg in DTO
  arm64: dts: renesas: r8a78000: Fix SCIF brg_int clocks

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 7fd2df20 7e070a14
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Original line number Diff line number Diff line
@@ -34,9 +34,6 @@ flash@18000000 {
		clocks = <&mstp9_clks R7S72100_CLK_SPIBSC0>;
		power-domains = <&cpg_clocks>;

		#address-cells = <1>;
		#size-cells = <1>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
+0 −2
Original line number Diff line number Diff line
@@ -36,8 +36,6 @@ flash@18000000 {
		power-domains = <&cpg_clocks>;
		bank-width = <4>;
		device-width = <1>;
		#address-cells = <1>;
		#size-cells = <1>;

		partitions {
			compatible = "fixed-partitions";
+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ b_clk: b {
		clock-div = <3>;
	};

	bsc: bus {
	bsc: bus@0 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
+1 −1
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ aliases {
		spi2 = &hspi2;
	};

	lbsc: bus {
	lbsc: bus@0 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
+1 −1
Original line number Diff line number Diff line
@@ -704,7 +704,7 @@ R8A7779_CLK_MMC1 R8A7779_CLK_MMC0
		};
	};

	lbsc: bus {
	lbsc: bus@0 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
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