Commit baefc7cd authored by Timur Kristóf's avatar Timur Kristóf Committed by Alex Deucher
Browse files

drm/amdgpu/vce1: Workaround PLL timeout on FirePro W9000 



Sometimes the VCE PLL times out waiting for CTLACK/CTLACK2.
When it happens, the VCE still works, but much slower.
Observed on a Tahiti GPU, but not all:
- FirePro W9000 has the issue
- Radeon R9 280X not affected
- Radeon HD 7990 not affected

As a workaround, on the affected chip just don't put the
VCE PLL in sleep mode. Leaving the VCE PLL in bypass mode
or reset mode both work. Using bypass mode is simpler.

Signed-off-by: default avatarTimur Kristóf <timur.kristof@gmail.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent eabc7166

drivers/gpu/drm/amd/amdgpu/si.c

+8 −0
Original line number Diff line number Diff line
@@ -1918,6 +1918,14 @@ static int si_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) 
		     ~VCEPLL_BYPASS_EN_MASK);



	if (!evclk || !ecclk) {

		/*

		 * On some chips, the PLL takes way too long to get out of

		 * sleep mode, causing a timeout waiting on CTLACK/CTLACK2.

		 * Leave the PLL running in bypass mode.

		 */

		if (adev->pdev->device == 0x6780)

			return 0;



		/* Keep the Bypass mode, put PLL to sleep */

		WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_SLEEP_MASK,

			     ~VCEPLL_SLEEP_MASK);