Commit bb61cf46 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.10-2024-05-30' of... 

Merge tag 'amd-drm-fixes-6.10-2024-05-30' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.10-2024-05-30:

amdgpu:
- RAS fix
- Fix colorspace property for MST connectors
- Fix for PCIe DPM
- Silence UBSAN warning
- GPUVM robustness fix
- Partition fix
- Drop deprecated I2C_CLASS_SPD

amdkfd:
- Revert unused changes for certain 11.0.3 devices
- Simplify APU VRAM handling

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240530202316.2246826-1-alexander.deucher@amd.com
parents c301c3d2 67c7d4fa

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

+8 −8
Original line number Diff line number Diff line
@@ -196,7 +196,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev, 
			return -EINVAL;



		vram_size = KFD_XCP_MEMORY_SIZE(adev, xcp_id);

		if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {

		if (adev->flags & AMD_IS_APU) {

			system_mem_needed = size;

			ttm_mem_needed = size;

		}
@@ -233,7 +233,7 @@ int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev, 
	if (adev && xcp_id >= 0) {

		adev->kfd.vram_used[xcp_id] += vram_needed;

		adev->kfd.vram_used_aligned[xcp_id] +=

				(adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) ?

				(adev->flags & AMD_IS_APU) ?

				vram_needed :

				ALIGN(vram_needed, VRAM_AVAILABLITY_ALIGN);

	}
@@ -261,7 +261,7 @@ void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device *adev, 


		if (adev) {

			adev->kfd.vram_used[xcp_id] -= size;

			if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {

			if (adev->flags & AMD_IS_APU) {

				adev->kfd.vram_used_aligned[xcp_id] -= size;

				kfd_mem_limit.system_mem_used -= size;

				kfd_mem_limit.ttm_mem_used -= size;
@@ -890,7 +890,7 @@ static int kfd_mem_attach(struct amdgpu_device *adev, struct kgd_mem *mem, 
	 * if peer device has large BAR. In contrast, access over xGMI is

	 * allowed for both small and large BAR configurations of peer device

	 */

	if ((adev != bo_adev && !(adev->gmc.is_app_apu || adev->flags & AMD_IS_APU)) &&

	if ((adev != bo_adev && !(adev->flags & AMD_IS_APU)) &&

	    ((mem->domain == AMDGPU_GEM_DOMAIN_VRAM) ||

	     (mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) ||

	     (mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP))) {
@@ -1658,7 +1658,7 @@ size_t amdgpu_amdkfd_get_available_memory(struct amdgpu_device *adev, 
		- atomic64_read(&adev->vram_pin_size)

		- reserved_for_pt;



	if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {

	if (adev->flags & AMD_IS_APU) {

		system_mem_available = no_system_mem_limit ?

					kfd_mem_limit.max_system_mem_limit :

					kfd_mem_limit.max_system_mem_limit -
@@ -1706,7 +1706,7 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( 
	if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {

		domain = alloc_domain = AMDGPU_GEM_DOMAIN_VRAM;



		if (adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) {

		if (adev->flags & AMD_IS_APU) {

			domain = AMDGPU_GEM_DOMAIN_GTT;

			alloc_domain = AMDGPU_GEM_DOMAIN_GTT;

			alloc_flags = 0;
@@ -1953,7 +1953,7 @@ int amdgpu_amdkfd_gpuvm_free_memory_of_gpu( 
	if (size) {

		if (!is_imported &&

		   (mem->bo->preferred_domains == AMDGPU_GEM_DOMAIN_VRAM ||

		   ((adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) &&

		   ((adev->flags & AMD_IS_APU) &&

		    mem->bo->preferred_domains == AMDGPU_GEM_DOMAIN_GTT)))

			*size = bo_size;

		else
@@ -2376,7 +2376,7 @@ static int import_obj_create(struct amdgpu_device *adev, 
	(*mem)->bo = bo;

	(*mem)->va = va;

	(*mem)->domain = (bo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM) &&

			 !(adev->gmc.is_app_apu || adev->flags & AMD_IS_APU) ?

			 !(adev->flags & AMD_IS_APU) ?

			 AMDGPU_GEM_DOMAIN_VRAM : AMDGPU_GEM_DOMAIN_GTT;



	(*mem)->mapped_to_gpu_memory = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+12 −7
Original line number Diff line number Diff line
@@ -5944,6 +5944,7 @@ static void amdgpu_device_partner_bandwidth(struct amdgpu_device *adev, 
	*speed = PCI_SPEED_UNKNOWN;

	*width = PCIE_LNK_WIDTH_UNKNOWN;



	if (amdgpu_device_pcie_dynamic_switching_supported(adev)) {

		while ((parent = pci_upstream_bridge(parent))) {

			/* skip upstream/downstream switches internal to dGPU*/

			if (parent->vendor == PCI_VENDOR_ID_ATI)
@@ -5952,6 +5953,10 @@ static void amdgpu_device_partner_bandwidth(struct amdgpu_device *adev, 
			*width = pcie_get_width_cap(parent);

			break;

		}

	} else {

		/* use the current speeds rather than max if switching is not supported */

		pcie_bandwidth_available(adev->pdev, NULL, speed, width);

	}

}



/**

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h

+1 −1
Original line number Diff line number Diff line
@@ -46,7 +46,7 @@ struct amdgpu_iv_entry; 
#define AMDGPU_RAS_GPU_ERR_HBM_BIST_TEST(x)		AMDGPU_GET_REG_FIELD(x, 7, 7)

#define AMDGPU_RAS_GPU_ERR_SOCKET_ID(x)			AMDGPU_GET_REG_FIELD(x, 10, 8)

#define AMDGPU_RAS_GPU_ERR_AID_ID(x)			AMDGPU_GET_REG_FIELD(x, 12, 11)

#define AMDGPU_RAS_GPU_ERR_HBM_ID(x)			AMDGPU_GET_REG_FIELD(x, 13, 13)

#define AMDGPU_RAS_GPU_ERR_HBM_ID(x)			AMDGPU_GET_REG_FIELD(x, 14, 13)

#define AMDGPU_RAS_GPU_ERR_BOOT_STATUS(x)		AMDGPU_GET_REG_FIELD(x, 31, 31)



#define AMDGPU_RAS_BOOT_STATUS_POLLING_LIMIT	1000

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

+5 −1
Original line number Diff line number Diff line
@@ -706,11 +706,15 @@ int amdgpu_vm_pde_update(struct amdgpu_vm_update_params *params, 
			 struct amdgpu_vm_bo_base *entry)

{

	struct amdgpu_vm_bo_base *parent = amdgpu_vm_pt_parent(entry);

	struct amdgpu_bo *bo = parent->bo, *pbo;

	struct amdgpu_bo *bo, *pbo;

	struct amdgpu_vm *vm = params->vm;

	uint64_t pde, pt, flags;

	unsigned int level;



	if (WARN_ON(!parent))

		return -EINVAL;



	bo = parent->bo;

	for (level = 0, pbo = bo->parent; pbo; ++level)

		pbo = pbo->parent;

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

+1 −1
Original line number Diff line number Diff line
@@ -422,7 +422,7 @@ __aqua_vanjaram_get_auto_mode(struct amdgpu_xcp_mgr *xcp_mgr) 


	if (adev->gmc.num_mem_partitions == num_xcc / 2)

		return (adev->flags & AMD_IS_APU) ? AMDGPU_TPX_PARTITION_MODE :

						    AMDGPU_QPX_PARTITION_MODE;

						    AMDGPU_CPX_PARTITION_MODE;



	if (adev->gmc.num_mem_partitions == 2 && !(adev->flags & AMD_IS_APU))

		return AMDGPU_DPX_PARTITION_MODE;