Commit bc1ce503 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Move dsc/joiner enable into hsw_crtc_enable() 



Lift the dsc/joiner enable up from the wonky places where it
currently sits (ddi .pre_enable() or icl_ddi_bigjoiner_pre_enable())
into hsw_crtc_enable() where we write the other per-pipe stuff
as well. Makes the transcoder vs. pipe split less confusing.

For DSI this results in slight reordering between the dsc/joiner
enable vs. transcoder timings setup, but I can't really think
why that should cause any issues since the transcoder isn't yet
enabled at that point.

v2: Take care of dsi (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220125063937.7003-1-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 1d894ce8

drivers/gpu/drm/i915/display/icl_dsi.c

+0 −2
Original line number Diff line number Diff line
@@ -1233,8 +1233,6 @@ static void gen11_dsi_pre_enable(struct intel_atomic_state *state, 


	intel_dsc_dsi_pps_write(encoder, pipe_config);



	intel_dsc_enable(pipe_config);



	/* step6c: configure transcoder timings */

	gen11_dsi_set_transcoder_timings(encoder, pipe_config);

}

drivers/gpu/drm/i915/display/intel_ddi.c

+0 −6
Original line number Diff line number Diff line
@@ -2425,9 +2425,6 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state, 
	intel_ddi_enable_fec(encoder, crtc_state);



	intel_dsc_dp_pps_write(encoder, crtc_state);



	if (!crtc_state->bigjoiner)

		intel_dsc_enable(crtc_state);

}



static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
@@ -2493,9 +2490,6 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state, 
		intel_ddi_enable_pipe_clock(encoder, crtc_state);



	intel_dsc_dp_pps_write(encoder, crtc_state);



	if (!crtc_state->bigjoiner)

		intel_dsc_enable(crtc_state);

}



static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,

drivers/gpu/drm/i915/display/intel_display.c

+5 −7
Original line number Diff line number Diff line
@@ -1973,7 +1973,6 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state) 
static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,

					 const struct intel_crtc_state *crtc_state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_crtc_state *master_crtc_state;

	struct intel_crtc *master_crtc;

	struct drm_connector_state *conn_state;
@@ -2003,12 +2002,6 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state, 


	if (crtc_state->bigjoiner_slave)

		intel_encoders_pre_enable(state, master_crtc);



	/* need to enable VDSC, which we skipped in pre-enable */

	intel_dsc_enable(crtc_state);



	if (DISPLAY_VER(dev_priv) >= 13)

		intel_uncompressed_joiner_enable(crtc_state);

}



static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)
@@ -2056,6 +2049,11 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, 
		icl_ddi_bigjoiner_pre_enable(state, new_crtc_state);

	}



	intel_dsc_enable(new_crtc_state);



	if (DISPLAY_VER(dev_priv) >= 13)

		intel_uncompressed_joiner_enable(new_crtc_state);



	intel_set_pipe_src_size(new_crtc_state);

	if (DISPLAY_VER(dev_priv) >= 9 || IS_BROADWELL(dev_priv))

		bdw_set_pipemisc(new_crtc_state);