Commit bcc492d7 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/cdclk: Introduce intel_cdclk_modeset_checks() 



I plan to better decouple the cdclk computation from actual
modesets. To that end make the cdclk code self sufficient in
being able to determine if a full cdclk calculation/update is
needed or not due to some not strictly cdclk related reason.

Currently we have three such things that depend active_pipes:
- cdclk_state->actual
- glk audio w/a
- dg2 power well stuff

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-8-ville.syrjala@linux.intel.com


Reviewed-by: default avatarMika Kahola <mika.kahola@intel.com>
parent 9112ce99

drivers/gpu/drm/i915/display/intel_cdclk.c

+43 −5
Original line number Diff line number Diff line
@@ -3187,6 +3187,44 @@ intel_atomic_get_cdclk_state(struct intel_atomic_state *state) 
	return to_intel_cdclk_state(cdclk_state);

}



static int intel_cdclk_modeset_checks(struct intel_atomic_state *state,

				      bool *need_cdclk_calc)

{

	struct intel_display *display = to_intel_display(state);

	const struct intel_cdclk_state *old_cdclk_state;

	struct intel_cdclk_state *new_cdclk_state;

	int ret;



	if (!intel_any_crtc_active_changed(state))

		return 0;



	new_cdclk_state = intel_atomic_get_cdclk_state(state);

	if (IS_ERR(new_cdclk_state))

		return PTR_ERR(new_cdclk_state);



	old_cdclk_state = intel_atomic_get_old_cdclk_state(state);



	new_cdclk_state->active_pipes =

		intel_calc_active_pipes(state, old_cdclk_state->active_pipes);



	ret = intel_atomic_lock_global_state(&new_cdclk_state->base);

	if (ret)

		return ret;



	if (!old_cdclk_state->active_pipes != !new_cdclk_state->active_pipes)

		*need_cdclk_calc = true;



	if (glk_cdclk_audio_wa_needed(display, old_cdclk_state) !=

	    glk_cdclk_audio_wa_needed(display, new_cdclk_state))

		*need_cdclk_calc = true;



	if (dg2_power_well_count(display, old_cdclk_state) !=

	    dg2_power_well_count(display, new_cdclk_state))

		*need_cdclk_calc = true;



	return 0;

}



int intel_cdclk_atomic_check(struct intel_atomic_state *state,

			     bool *need_cdclk_calc)

{
@@ -3197,6 +3235,10 @@ int intel_cdclk_atomic_check(struct intel_atomic_state *state, 
	int ret;

	int i;



	ret = intel_cdclk_modeset_checks(state, need_cdclk_calc);

	if (ret)

		return ret;



	/*

	 * active_planes bitmask has been updated, and potentially affected

	 * planes are part of the state. We can now compute the minimum cdclk
@@ -3278,9 +3320,6 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state) 


	old_cdclk_state = intel_atomic_get_old_cdclk_state(state);



	new_cdclk_state->active_pipes =

		intel_calc_active_pipes(state, old_cdclk_state->active_pipes);



	ret = intel_cdclk_modeset_calc_cdclk(state);

	if (ret)

		return ret;
@@ -3293,8 +3332,7 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state) 
		ret = intel_atomic_serialize_global_state(&new_cdclk_state->base);

		if (ret)

			return ret;

	} else if (old_cdclk_state->active_pipes != new_cdclk_state->active_pipes ||

		   old_cdclk_state->force_min_cdclk != new_cdclk_state->force_min_cdclk ||

	} else if (old_cdclk_state->force_min_cdclk != new_cdclk_state->force_min_cdclk ||

		   intel_cdclk_changed(&old_cdclk_state->logical,

				       &new_cdclk_state->logical)) {

		ret = intel_atomic_lock_global_state(&new_cdclk_state->base);