Commit bd00b29b authored by Danny Wang's avatar Danny Wang Committed by Alex Deucher
Browse files

drm/amd/display: Do not enable replay when vtotal update is pending. 



[Why&How]
Vtotal is not applied to HW when handling vsync interrupt.
Make sure vtotal is aligned before enable replay.

Reviewed-by: default avatarAnthony Koo <anthony.koo@amd.com>
Reviewed-by: default avatarRobin Chen <robin.chen@amd.com>
Signed-off-by: default avatarDanny Wang <danny.wang@amd.com>
Signed-off-by: default avatarZhongwei Zhang <Zhongwei.Zhang@amd.com>
Signed-off-by: default avatarTom Chung <chiahsuan.chung@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 50e0bae3

drivers/gpu/drm/amd/display/dc/core/dc.c

+7 −2
Original line number Diff line number Diff line
@@ -453,6 +453,7 @@ bool dc_stream_adjust_vmin_vmax(struct dc *dc, 


	if (dc->caps.max_v_total != 0 &&

		(adjust->v_total_max > dc->caps.max_v_total || adjust->v_total_min > dc->caps.max_v_total)) {

		stream->adjust.timing_adjust_pending = false;

		if (adjust->allow_otg_v_count_halt)

			return set_long_vtotal(dc, stream, adjust);

		else
@@ -466,7 +467,7 @@ bool dc_stream_adjust_vmin_vmax(struct dc *dc, 
			dc->hwss.set_drr(&pipe,

					1,

					*adjust);



			stream->adjust.timing_adjust_pending = false;

			return true;

		}

	}
@@ -3165,8 +3166,12 @@ static void copy_stream_update_to_stream(struct dc *dc, 
	if (update->vrr_active_fixed)

		stream->vrr_active_fixed = *update->vrr_active_fixed;



	if (update->crtc_timing_adjust)

	if (update->crtc_timing_adjust) {

		if (stream->adjust.v_total_min != update->crtc_timing_adjust->v_total_min ||

			stream->adjust.v_total_max != update->crtc_timing_adjust->v_total_max)

			stream->adjust.timing_adjust_pending = true;

		stream->adjust = *update->crtc_timing_adjust;

	}



	if (update->dpms_off)

		stream->dpms_off = *update->dpms_off;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

+15 −0
Original line number Diff line number Diff line
@@ -659,6 +659,21 @@ void set_p_state_switch_method( 
	}

}



void set_drr_and_clear_adjust_pending(

		struct pipe_ctx *pipe_ctx,

		struct dc_stream_state *stream,

		struct drr_params *params)

{

	/* params can be null.*/

	if (pipe_ctx && pipe_ctx->stream_res.tg &&

			pipe_ctx->stream_res.tg->funcs->set_drr)

		pipe_ctx->stream_res.tg->funcs->set_drr(

				pipe_ctx->stream_res.tg, params);



	if (stream)

		stream->adjust.timing_adjust_pending = false;

}



void get_fams2_visual_confirm_color(

		struct dc *dc,

		struct dc_state *context,

drivers/gpu/drm/amd/display/dc/dc_hw_types.h

+1 −0
Original line number Diff line number Diff line
@@ -1017,6 +1017,7 @@ struct dc_crtc_timing_adjust { 
	uint32_t v_total_mid;

	uint32_t v_total_mid_frame_num;

	uint32_t allow_otg_v_count_halt;

	uint8_t timing_adjust_pending;

};

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

+2 −5
Original line number Diff line number Diff line
@@ -1658,9 +1658,7 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw( 


	params.vertical_total_min = stream->adjust.v_total_min;

	params.vertical_total_max = stream->adjust.v_total_max;

	if (pipe_ctx->stream_res.tg->funcs->set_drr)

		pipe_ctx->stream_res.tg->funcs->set_drr(

			pipe_ctx->stream_res.tg, &params);

	set_drr_and_clear_adjust_pending(pipe_ctx, stream, &params);



	// DRR should set trigger event to monitor surface update event

	if (stream->adjust.v_total_min != 0 && stream->adjust.v_total_max != 0)
@@ -2109,8 +2107,7 @@ static void set_drr(struct pipe_ctx **pipe_ctx, 
		struct timing_generator *tg = pipe_ctx[i]->stream_res.tg;



		if ((tg != NULL) && tg->funcs) {

			if (tg->funcs->set_drr)

				tg->funcs->set_drr(tg, &params);

			set_drr_and_clear_adjust_pending(pipe_ctx[i], pipe_ctx[i]->stream, &params);

			if (adjust.v_total_max != 0 && adjust.v_total_min != 0)

				if (tg->funcs->set_static_screen_control)

					tg->funcs->set_static_screen_control(

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

+2 −5
Original line number Diff line number Diff line
@@ -1113,9 +1113,7 @@ static void dcn10_reset_back_end_for_pipe( 
		pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg);



		pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false);

		if (pipe_ctx->stream_res.tg->funcs->set_drr)

			pipe_ctx->stream_res.tg->funcs->set_drr(

					pipe_ctx->stream_res.tg, NULL);

		set_drr_and_clear_adjust_pending(pipe_ctx, pipe_ctx->stream, NULL);

		if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))

			pipe_ctx->stream->link->phy_state.symclk_ref_cnts.otg = 0;

	}
@@ -3218,8 +3216,7 @@ void dcn10_set_drr(struct pipe_ctx **pipe_ctx, 
		struct timing_generator *tg = pipe_ctx[i]->stream_res.tg;



		if ((tg != NULL) && tg->funcs) {

			if (tg->funcs->set_drr)

				tg->funcs->set_drr(tg, &params);

			set_drr_and_clear_adjust_pending(pipe_ctx[i], pipe_ctx[i]->stream, &params);

			if (adjust.v_total_max != 0 && adjust.v_total_min != 0)

				if (tg->funcs->set_static_screen_control)

					tg->funcs->set_static_screen_control(