Commit bd4a8342 authored by Michael Ellerman's avatar Michael Ellerman Committed by Madhavan Srinivasan
Browse files

powerpc: Remove DCR_MMIO and the DCR generic layer 



The Cell blade support was the last user of DCR_MMIO, so it can now
be removed.

That only leaves DCR_NATIVE, meaning the DCR generic layer which allows
using either DCR_NATIVE or DCR_MMIO is also unnecessary, remove it too.

Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Signed-off-by: default avatarMadhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/20241218105523.416573-7-mpe@ellerman.id.au
parent 41cc49ef

arch/powerpc/Kconfig

+1 −4
Original line number Diff line number Diff line
@@ -412,12 +412,9 @@ config ARCH_HAS_ADD_PAGES 
config PPC_DCR_NATIVE

	bool



config PPC_DCR_MMIO

	bool



config PPC_DCR

	bool

	depends on PPC_DCR_NATIVE || PPC_DCR_MMIO

	depends on PPC_DCR_NATIVE

	default y



config PPC_PCI_OF_BUS_MAP

arch/powerpc/include/asm/dcr-generic.h

deleted100644 → 0
+0 −36
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-or-later */

/*

 * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.

 *                    <benh@kernel.crashing.org>

 */



#ifndef _ASM_POWERPC_DCR_GENERIC_H

#define _ASM_POWERPC_DCR_GENERIC_H

#ifdef __KERNEL__

#ifndef __ASSEMBLY__



enum host_type_t {DCR_HOST_MMIO, DCR_HOST_NATIVE, DCR_HOST_INVALID};



typedef struct {

	enum host_type_t type;

	union {

		dcr_host_mmio_t mmio;

		dcr_host_native_t native;

	} host;

} dcr_host_t;



extern bool dcr_map_ok_generic(dcr_host_t host);



extern dcr_host_t dcr_map_generic(struct device_node *dev, unsigned int dcr_n,

			  unsigned int dcr_c);

extern void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c);



extern u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n);



extern void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value);



#endif /* __ASSEMBLY__ */

#endif /* __KERNEL__ */

#endif /* _ASM_POWERPC_DCR_GENERIC_H */

arch/powerpc/include/asm/dcr-mmio.h

deleted100644 → 0
+0 −44
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-or-later */

/*

 * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.

 *                    <benh@kernel.crashing.org>

 */



#ifndef _ASM_POWERPC_DCR_MMIO_H

#define _ASM_POWERPC_DCR_MMIO_H

#ifdef __KERNEL__



#include <asm/io.h>



typedef struct {

	void __iomem *token;

	unsigned int stride;

	unsigned int base;

} dcr_host_mmio_t;



static inline bool dcr_map_ok_mmio(dcr_host_mmio_t host)

{

	return host.token != NULL;

}



extern dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,

				    unsigned int dcr_n,

				    unsigned int dcr_c);

extern void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c);



static inline u32 dcr_read_mmio(dcr_host_mmio_t host, unsigned int dcr_n)

{

	return in_be32(host.token + ((host.base + dcr_n) * host.stride));

}



static inline void dcr_write_mmio(dcr_host_mmio_t host,

				  unsigned int dcr_n,

				  u32 value)

{

	out_be32(host.token + ((host.base + dcr_n) * host.stride), value);

}



#endif /* __KERNEL__ */

#endif /* _ASM_POWERPC_DCR_MMIO_H */

arch/powerpc/include/asm/dcr.h

+0 −32
Original line number Diff line number Diff line
@@ -10,46 +10,14 @@ 
#ifndef __ASSEMBLY__

#ifdef CONFIG_PPC_DCR



#ifdef CONFIG_PPC_DCR_NATIVE

#include <asm/dcr-native.h>

#endif



#ifdef CONFIG_PPC_DCR_MMIO

#include <asm/dcr-mmio.h>

#endif





/* Indirection layer for providing both NATIVE and MMIO support. */



#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)



#include <asm/dcr-generic.h>



#define DCR_MAP_OK(host)	dcr_map_ok_generic(host)

#define dcr_map(dev, dcr_n, dcr_c) dcr_map_generic(dev, dcr_n, dcr_c)

#define dcr_unmap(host, dcr_c) dcr_unmap_generic(host, dcr_c)

#define dcr_read(host, dcr_n) dcr_read_generic(host, dcr_n)

#define dcr_write(host, dcr_n, value) dcr_write_generic(host, dcr_n, value)



#else



#ifdef CONFIG_PPC_DCR_NATIVE

typedef dcr_host_native_t dcr_host_t;

#define DCR_MAP_OK(host)	dcr_map_ok_native(host)

#define dcr_map(dev, dcr_n, dcr_c) dcr_map_native(dev, dcr_n, dcr_c)

#define dcr_unmap(host, dcr_c) dcr_unmap_native(host, dcr_c)

#define dcr_read(host, dcr_n) dcr_read_native(host, dcr_n)

#define dcr_write(host, dcr_n, value) dcr_write_native(host, dcr_n, value)

#else

typedef dcr_host_mmio_t dcr_host_t;

#define DCR_MAP_OK(host)	dcr_map_ok_mmio(host)

#define dcr_map(dev, dcr_n, dcr_c) dcr_map_mmio(dev, dcr_n, dcr_c)

#define dcr_unmap(host, dcr_c) dcr_unmap_mmio(host, dcr_c)

#define dcr_read(host, dcr_n) dcr_read_mmio(host, dcr_n)

#define dcr_write(host, dcr_n, value) dcr_write_mmio(host, dcr_n, value)

#endif



#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */



/*

 * additional helpers to read the DCR * base from the device-tree

arch/powerpc/sysdev/dcr.c

+0 −182
Original line number Diff line number Diff line
@@ -11,107 +11,6 @@ 
#include <linux/of_address.h>

#include <asm/dcr.h>



#ifdef CONFIG_PPC_DCR_MMIO

static struct device_node *find_dcr_parent(struct device_node *node)

{

	struct device_node *par, *tmp;

	const u32 *p;



	for (par = of_node_get(node); par;) {

		if (of_property_read_bool(par, "dcr-controller"))

			break;

		p = of_get_property(par, "dcr-parent", NULL);

		tmp = par;

		if (p == NULL)

			par = of_get_parent(par);

		else

			par = of_find_node_by_phandle(*p);

		of_node_put(tmp);

	}

	return par;

}

#endif



#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)



bool dcr_map_ok_generic(dcr_host_t host)

{

	if (host.type == DCR_HOST_NATIVE)

		return dcr_map_ok_native(host.host.native);

	else if (host.type == DCR_HOST_MMIO)

		return dcr_map_ok_mmio(host.host.mmio);

	else

		return false;

}

EXPORT_SYMBOL_GPL(dcr_map_ok_generic);



dcr_host_t dcr_map_generic(struct device_node *dev,

			   unsigned int dcr_n,

			   unsigned int dcr_c)

{

	dcr_host_t host;

	struct device_node *dp;

	const char *prop;



	host.type = DCR_HOST_INVALID;



	dp = find_dcr_parent(dev);

	if (dp == NULL)

		return host;



	prop = of_get_property(dp, "dcr-access-method", NULL);



	pr_debug("dcr_map_generic(dcr-access-method = %s)\n", prop);



	if (!strcmp(prop, "native")) {

		host.type = DCR_HOST_NATIVE;

		host.host.native = dcr_map_native(dev, dcr_n, dcr_c);

	} else if (!strcmp(prop, "mmio")) {

		host.type = DCR_HOST_MMIO;

		host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c);

	}



	of_node_put(dp);

	return host;

}

EXPORT_SYMBOL_GPL(dcr_map_generic);



void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c)

{

	if (host.type == DCR_HOST_NATIVE)

		dcr_unmap_native(host.host.native, dcr_c);

	else if (host.type == DCR_HOST_MMIO)

		dcr_unmap_mmio(host.host.mmio, dcr_c);

	else /* host.type == DCR_HOST_INVALID */

		WARN_ON(true);

}

EXPORT_SYMBOL_GPL(dcr_unmap_generic);



u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n)

{

	if (host.type == DCR_HOST_NATIVE)

		return dcr_read_native(host.host.native, dcr_n);

	else if (host.type == DCR_HOST_MMIO)

		return dcr_read_mmio(host.host.mmio, dcr_n);

	else /* host.type == DCR_HOST_INVALID */

		WARN_ON(true);

	return 0;

}

EXPORT_SYMBOL_GPL(dcr_read_generic);



void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value)

{

	if (host.type == DCR_HOST_NATIVE)

		dcr_write_native(host.host.native, dcr_n, value);

	else if (host.type == DCR_HOST_MMIO)

		dcr_write_mmio(host.host.mmio, dcr_n, value);

	else /* host.type == DCR_HOST_INVALID */

		WARN_ON(true);

}

EXPORT_SYMBOL_GPL(dcr_write_generic);



#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */



unsigned int dcr_resource_start(const struct device_node *np,

				unsigned int index)

{
@@ -137,86 +36,5 @@ unsigned int dcr_resource_len(const struct device_node *np, unsigned int index) 
}

EXPORT_SYMBOL_GPL(dcr_resource_len);



#ifdef CONFIG_PPC_DCR_MMIO



static u64 of_translate_dcr_address(struct device_node *dev,

				    unsigned int dcr_n,

				    unsigned int *out_stride)

{

	struct device_node *dp;

	const u32 *p;

	unsigned int stride;

	u64 ret = OF_BAD_ADDR;



	dp = find_dcr_parent(dev);

	if (dp == NULL)

		return OF_BAD_ADDR;



	/* Stride is not properly defined yet, default to 0x10 for Axon */

	p = of_get_property(dp, "dcr-mmio-stride", NULL);

	stride = (p == NULL) ? 0x10 : *p;



	/* XXX FIXME: Which property name is to use of the 2 following ? */

	p = of_get_property(dp, "dcr-mmio-range", NULL);

	if (p == NULL)

		p = of_get_property(dp, "dcr-mmio-space", NULL);

	if (p == NULL)

		goto done;



	/* Maybe could do some better range checking here */

	ret = of_translate_address(dp, p);

	if (ret != OF_BAD_ADDR)

		ret += (u64)(stride) * (u64)dcr_n;

	if (out_stride)

		*out_stride = stride;



 done:

	of_node_put(dp);

	return ret;

}



dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,

			     unsigned int dcr_n,

			     unsigned int dcr_c)

{

	dcr_host_mmio_t ret = { .token = NULL, .stride = 0, .base = dcr_n };

	u64 addr;



	pr_debug("dcr_map(%pOF, 0x%x, 0x%x)\n",

		 dev, dcr_n, dcr_c);



	addr = of_translate_dcr_address(dev, dcr_n, &ret.stride);

	pr_debug("translates to addr: 0x%llx, stride: 0x%x\n",

		 (unsigned long long) addr, ret.stride);

	if (addr == OF_BAD_ADDR)

		return ret;

	pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride);

	ret.token = ioremap(addr, dcr_c * ret.stride);

	if (ret.token == NULL)

		return ret;

	pr_debug("mapped at 0x%p -> base is 0x%p\n",

		 ret.token, ret.token - dcr_n * ret.stride);

	ret.token -= dcr_n * ret.stride;

	return ret;

}

EXPORT_SYMBOL_GPL(dcr_map_mmio);



void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c)

{

	dcr_host_mmio_t h = host;



	if (h.token == NULL)

		return;

	h.token += host.base * h.stride;

	iounmap(h.token);

	h.token = NULL;

}

EXPORT_SYMBOL_GPL(dcr_unmap_mmio);



#endif /* defined(CONFIG_PPC_DCR_MMIO) */



#ifdef CONFIG_PPC_DCR_NATIVE

DEFINE_SPINLOCK(dcr_ind_lock);

EXPORT_SYMBOL_GPL(dcr_ind_lock);
 
#endif	/* defined(CONFIG_PPC_DCR_NATIVE) */