Commit bdd7c35f authored by Ira Weiny's avatar Ira Weiny Committed by Dave Jiang
Browse files

cxl/cdat: Use %pra for dpa range outputs 



Now that there is a printf specifier for struct range use it to enhance
the debug output of CDAT data.

Reviewed-by: default avatarAlison Schofield <alison.schofield@intel.com>
Signed-off-by: default avatarIra Weiny <ira.weiny@intel.com>
Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: default avatarFan Ni <fan.ni@samsung.com>
Link: https://patch.msgid.link/20241025-cxl-pra-v2-4-123a825daba2@intel.com


Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
parent 42619747

drivers/cxl/core/cdat.c

+4 −4
Original line number Diff line number Diff line
@@ -247,8 +247,8 @@ static void update_perf_entry(struct device *dev, struct dsmas_entry *dent, 
	dpa_perf->dpa_range = dent->dpa_range;

	dpa_perf->qos_class = dent->qos_class;

	dev_dbg(dev,

		"DSMAS: dpa: %#llx qos: %d read_bw: %d write_bw %d read_lat: %d write_lat: %d\n",

		dent->dpa_range.start, dpa_perf->qos_class,

		"DSMAS: dpa: %pra qos: %d read_bw: %d write_bw %d read_lat: %d write_lat: %d\n",

		&dent->dpa_range, dpa_perf->qos_class,

		dent->coord[ACCESS_COORDINATE_CPU].read_bandwidth,

		dent->coord[ACCESS_COORDINATE_CPU].write_bandwidth,

		dent->coord[ACCESS_COORDINATE_CPU].read_latency,
@@ -279,8 +279,8 @@ static void cxl_memdev_set_qos_class(struct cxl_dev_state *cxlds, 
			 range_contains(&pmem_range, &dent->dpa_range))

			update_perf_entry(dev, dent, &mds->pmem_perf);

		else

			dev_dbg(dev, "no partition for dsmas dpa: %#llx\n",

				dent->dpa_range.start);

			dev_dbg(dev, "no partition for dsmas dpa: %pra\n",

				&dent->dpa_range);

	}

}