Commit bde5d767 authored by Zhanjun Dong's avatar Zhanjun Dong Committed by Matt Roper
Browse files

drm/xe: Add helper macro to loop each DSS 



Add helper macro to loop each DSS. This is a precursor patch to allow
for easier iteration through MCR registers and other per-DSS uses.

Signed-off-by: default avatarZhanjun Dong <zhanjun.dong@intel.com>
Reviewed-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240314210735.258553-2-zhanjun.dong@intel.com
parent 43154713

drivers/gpu/drm/xe/xe_gt_mcr.c

+28 −6
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
#include "xe_gt_mcr.h"



#include "regs/xe_gt_regs.h"

#include "xe_assert.h"

#include "xe_gt.h"

#include "xe_gt_topology.h"

#include "xe_gt_types.h"
@@ -294,14 +295,35 @@ static void init_steering_mslice(struct xe_gt *gt) 
	gt->steering[LNCF].instance_target = 0;		/* unused */

}



static void init_steering_dss(struct xe_gt *gt)

static unsigned int dss_per_group(struct xe_gt *gt)

{

	return gt_to_xe(gt)->info.platform == XE_PVC ? 8 : 4;

}



/**

 * xe_gt_mcr_get_dss_steering - Get the group/instance steering for a DSS

 * @gt: GT structure

 * @dss: DSS ID to obtain steering for

 * @group: pointer to storage for steering group ID

 * @instance: pointer to storage for steering instance ID

 */

void xe_gt_mcr_get_dss_steering(struct xe_gt *gt, unsigned int dss, u16 *group, u16 *instance)

{

	unsigned int dss = min(xe_dss_mask_group_ffs(gt->fuse_topo.g_dss_mask, 0, 0),

			       xe_dss_mask_group_ffs(gt->fuse_topo.c_dss_mask, 0, 0));

	unsigned int dss_per_grp = gt_to_xe(gt)->info.platform == XE_PVC ? 8 : 4;

	int dss_per_grp = dss_per_group(gt);



	xe_gt_assert(gt, dss < XE_MAX_DSS_FUSE_BITS);



	*group = dss / dss_per_grp;

	*instance = dss % dss_per_grp;

}



	gt->steering[DSS].group_target = dss / dss_per_grp;

	gt->steering[DSS].instance_target = dss % dss_per_grp;

static void init_steering_dss(struct xe_gt *gt)

{

	xe_gt_mcr_get_dss_steering(gt,

				   min(xe_dss_mask_group_ffs(gt->fuse_topo.g_dss_mask, 0, 0),

				       xe_dss_mask_group_ffs(gt->fuse_topo.c_dss_mask, 0, 0)),

				   &gt->steering[DSS].group_target,

				   &gt->steering[DSS].instance_target);

}



static void init_steering_oaddrm(struct xe_gt *gt)

drivers/gpu/drm/xe/xe_gt_mcr.h

+14 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#define _XE_GT_MCR_H_



#include "regs/xe_reg_defs.h"

#include "xe_gt_topology.h"



struct drm_printer;

struct xe_gt;
@@ -25,5 +26,18 @@ void xe_gt_mcr_multicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg, 
			       u32 value);



void xe_gt_mcr_steering_dump(struct xe_gt *gt, struct drm_printer *p);

void xe_gt_mcr_get_dss_steering(struct xe_gt *gt, unsigned int dss, u16 *group, u16 *instance);



/*

 * Loop over each DSS and determine the group and instance IDs that

 * should be used to steer MCR accesses toward this DSS.

 * @dss: DSS ID to obtain steering for

 * @gt: GT structure

 * @group: steering group ID, data type: u16

 * @instance: steering instance ID, data type: u16

 */

#define for_each_dss_steering(dss, gt, group, instance) \

	for_each_dss((dss), (gt)) \

		for_each_if((xe_gt_mcr_get_dss_steering((gt), (dss), &(group), &(instance)), true))



#endif /* _XE_GT_MCR_H_ */

drivers/gpu/drm/xe/xe_gt_topology.c

+0 −3
Original line number Diff line number Diff line
@@ -11,9 +11,6 @@ 
#include "xe_gt.h"

#include "xe_mmio.h"



#define XE_MAX_DSS_FUSE_BITS (32 * XE_MAX_DSS_FUSE_REGS)

#define XE_MAX_EU_FUSE_BITS (32 * XE_MAX_EU_FUSE_REGS)



static void

load_dss_mask(struct xe_gt *gt, xe_dss_mask_t mask, int numregs, ...)

{

drivers/gpu/drm/xe/xe_gt_topology.h

+11 −0
Original line number Diff line number Diff line
@@ -8,6 +8,17 @@ 


#include "xe_gt_types.h"



/*

 * Loop over each DSS with the bit is 1 in geometry or compute mask

 * @dss: iterated DSS bit from the DSS mask

 * @gt: GT structure

 */

#define for_each_dss(dss, gt) \

	for_each_or_bit((dss), \

			(gt)->fuse_topo.g_dss_mask, \

			(gt)->fuse_topo.c_dss_mask, \

			XE_MAX_DSS_FUSE_BITS)



struct drm_printer;



void xe_gt_topology_init(struct xe_gt *gt);

drivers/gpu/drm/xe/xe_gt_types.h

+4 −2
Original line number Diff line number Diff line
@@ -25,10 +25,12 @@ enum xe_gt_type { 
};



#define XE_MAX_DSS_FUSE_REGS	3

#define XE_MAX_DSS_FUSE_BITS	(32 * XE_MAX_DSS_FUSE_REGS)

#define XE_MAX_EU_FUSE_REGS	1

#define XE_MAX_EU_FUSE_BITS	(32 * XE_MAX_EU_FUSE_REGS)



typedef unsigned long xe_dss_mask_t[BITS_TO_LONGS(32 * XE_MAX_DSS_FUSE_REGS)];

typedef unsigned long xe_eu_mask_t[BITS_TO_LONGS(32 * XE_MAX_EU_FUSE_REGS)];

typedef unsigned long xe_dss_mask_t[BITS_TO_LONGS(XE_MAX_DSS_FUSE_BITS)];

typedef unsigned long xe_eu_mask_t[BITS_TO_LONGS(XE_MAX_EU_FUSE_BITS)];



struct xe_mmio_range {

	u32 start;