Commit be69109e authored by Gianluca Boiano's avatar Gianluca Boiano Committed by Bjorn Andersson
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arm64: dts: qcom: msm8953: add SPI interfaces 



This change add spi_3, spi_5 and spi_6 interfaces to
MSM8953 devices.

Signed-off-by: default avatarGianluca Boiano <morf3089@gmail.com>
Acked-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231013110531.84140-1-morf3089@gmail.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent ae1122c3

arch/arm64/boot/dts/qcom/msm8953.dtsi

+102 −0
Original line number Diff line number Diff line
@@ -726,6 +726,48 @@ i2c_8_sleep: i2c-8-sleep-state { 
				bias-disable;

			};



			spi_3_default: spi-3-default-state {

				pins = "gpio10", "gpio11";

				function = "blsp_spi3";

				drive-strength = <2>;

				bias-disable;

			};



			spi_3_sleep: spi-3-sleep-state {

				pins = "gpio10", "gpio11";

				function = "gpio";

				drive-strength = <2>;

				bias-disable;

			};



			spi_5_default: spi-5-default-state {

				pins = "gpio18", "gpio19";

				function = "blsp_spi5";

				drive-strength = <2>;

				bias-disable;

			};



			spi_5_sleep: spi-5-sleep-state {

				pins = "gpio18", "gpio19";

				function = "gpio";

				drive-strength = <2>;

				bias-disable;

			};



			spi_6_default: spi-6-default-state {

				pins = "gpio22", "gpio23";

				function = "blsp_spi6";

				drive-strength = <2>;

				bias-disable;

			};



			spi_6_sleep: spi-6-sleep-state {

				pins = "gpio22", "gpio23";

				function = "gpio";

				drive-strength = <2>;

				bias-disable;

			};



			wcnss_pin_a: wcnss-active-state {



				wcss-wlan2-pins {
@@ -1360,6 +1402,26 @@ i2c_3: i2c@78b7000 { 
			status = "disabled";

		};



		spi_3: spi@78b7000 {

			compatible = "qcom,spi-qup-v2.2.1";

			reg = <0x078b7000 0x600>;

			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "core", "iface";

			clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,

				 <&gcc GCC_BLSP1_AHB_CLK>;

			dmas = <&blsp1_dma 8>, <&blsp1_dma 9>;

			dma-names = "tx", "rx";



			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&spi_3_default>;

			pinctrl-1 = <&spi_3_sleep>;



			#address-cells = <1>;

			#size-cells = <0>;



			status = "disabled";

		};



		i2c_4: i2c@78b8000 {

			compatible = "qcom,i2c-qup-v2.2.1";

			reg = <0x078b8000 0x600>;
@@ -1413,6 +1475,26 @@ i2c_5: i2c@7af5000 { 
			status = "disabled";

		};



		spi_5: spi@7af5000 {

			compatible = "qcom,spi-qup-v2.2.1";

			reg = <0x07af5000 0x600>;

			interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "core", "iface";

			clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>,

				<&gcc GCC_BLSP2_AHB_CLK>;

			dmas = <&blsp2_dma 4>, <&blsp2_dma 5>;

			dma-names = "tx", "rx";



			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&spi_5_default>;

			pinctrl-1 = <&spi_5_sleep>;



			#address-cells = <1>;

			#size-cells = <0>;



			status = "disabled";

		};



		i2c_6: i2c@7af6000 {

			compatible = "qcom,i2c-qup-v2.2.1";

			reg = <0x07af6000 0x600>;
@@ -1433,6 +1515,26 @@ i2c_6: i2c@7af6000 { 
			status = "disabled";

		};



		spi_6: spi@7af6000 {

			compatible = "qcom,spi-qup-v2.2.1";

			reg = <0x07af6000 0x600>;

			interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;

			clock-names = "core", "iface";

			clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>,

				 <&gcc GCC_BLSP2_AHB_CLK>;

			dmas = <&blsp2_dma 6>, <&blsp2_dma 7>;

			dma-names = "tx", "rx";



			pinctrl-names = "default", "sleep";

			pinctrl-0 = <&spi_6_default>;

			pinctrl-1 = <&spi_6_sleep>;



			#address-cells = <1>;

			#size-cells = <0>;



			status = "disabled";

		};



		i2c_7: i2c@7af7000 {

			compatible = "qcom,i2c-qup-v2.2.1";

			reg = <0x07af7000 0x600>;