Unverified Commit bf4cd841 authored by Clément Léger's avatar Clément Léger Committed by Palmer Dabbelt
Browse files

riscv: hwprobe: export Zfh[min] ISA extensions

Export Zfh[min] ISA extensions[1] through hwprobe only if FPU support
is available.

Link: https://drive.google.com/file/d/1z3tQQLm5ALsAD77PM0l0CHnapxWCeVzP/view

 [1]
Signed-off-by: default avatarClément Léger <cleger@rivosinc.com>
Reviewed-by: default avatarEvan Green <evan@rivosinc.com>
Link: https://lore.kernel.org/r/20231114141256.126749-11-cleger@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 11e8e1ee
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+6 −0
Original line number Diff line number Diff line
@@ -140,6 +140,12 @@ The following keys are defined:
  * :c:macro:`RISCV_HWPROBE_EXT_ZVKT`: The Zvkt extension is supported as
       defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.

  * :c:macro:`RISCV_HWPROBE_EXT_ZFH`: The Zfh extension version 1.0 is supported
       as defined in the RISC-V ISA manual.

  * :c:macro:`RISCV_HWPROBE_EXT_ZFHMIN`: The Zfhmin extension version 1.0 is
       supported as defined in the RISC-V ISA manual.

* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance
  information about the selected set of processors.

+2 −0
Original line number Diff line number Diff line
@@ -50,6 +50,8 @@ struct riscv_hwprobe {
#define		RISCV_HWPROBE_EXT_ZVKSED	(1 << 24)
#define		RISCV_HWPROBE_EXT_ZVKSH		(1 << 25)
#define		RISCV_HWPROBE_EXT_ZVKT		(1 << 26)
#define		RISCV_HWPROBE_EXT_ZFH		(1 << 27)
#define		RISCV_HWPROBE_EXT_ZFHMIN	(1 << 28)
#define RISCV_HWPROBE_KEY_CPUPERF_0	5
#define		RISCV_HWPROBE_MISALIGNED_UNKNOWN	(0 << 0)
#define		RISCV_HWPROBE_MISALIGNED_EMULATED	(1 << 0)
+5 −0
Original line number Diff line number Diff line
@@ -186,6 +186,11 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
			EXT_KEY(ZVKSH);
			EXT_KEY(ZVKT);
		}

		if (has_fpu()) {
			EXT_KEY(ZFH);
			EXT_KEY(ZFHMIN);
		}
#undef EXT_KEY
	}