Commit bf906c98 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.16-2025-07-01' of...

Merge tag 'amd-drm-fixes-6.16-2025-07-01' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.16-2025-07-01:

amdgpu:
- SDMA 5.x reset fix
- Add missing firmware declaration
- Fix leak in amdgpu_ctx_mgr_entity_fini()
- Freesync fix
- OLED backlight fix

amdkfd:
- mtype fix for ext coherent system memory
- MMU notifier fix
- gfx7/8 fix

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/r/20250701192642.32490-1-alexander.deucher@amd.com
parents d0b3b7b2 39d81457
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+8 −0
Original line number Diff line number Diff line
@@ -561,6 +561,13 @@ static uint32_t read_vmid_from_vmfault_reg(struct amdgpu_device *adev)
	return REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);
}

static uint32_t kgd_hqd_sdma_get_doorbell(struct amdgpu_device *adev,
					  int engine, int queue)

{
	return 0;
}

const struct kfd2kgd_calls gfx_v7_kfd2kgd = {
	.program_sh_mem_settings = kgd_program_sh_mem_settings,
	.set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
@@ -578,4 +585,5 @@ const struct kfd2kgd_calls gfx_v7_kfd2kgd = {
	.set_scratch_backing_va = set_scratch_backing_va,
	.set_vm_context_page_table_base = set_vm_context_page_table_base,
	.read_vmid_from_vmfault_reg = read_vmid_from_vmfault_reg,
	.hqd_sdma_get_doorbell = kgd_hqd_sdma_get_doorbell,
};
+8 −0
Original line number Diff line number Diff line
@@ -582,6 +582,13 @@ static void set_vm_context_page_table_base(struct amdgpu_device *adev,
			lower_32_bits(page_table_base));
}

static uint32_t kgd_hqd_sdma_get_doorbell(struct amdgpu_device *adev,
					  int engine, int queue)

{
	return 0;
}

const struct kfd2kgd_calls gfx_v8_kfd2kgd = {
	.program_sh_mem_settings = kgd_program_sh_mem_settings,
	.set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
@@ -599,4 +606,5 @@ const struct kfd2kgd_calls gfx_v8_kfd2kgd = {
			get_atc_vmid_pasid_mapping_info,
	.set_scratch_backing_va = set_scratch_backing_va,
	.set_vm_context_page_table_base = set_vm_context_page_table_base,
	.hqd_sdma_get_doorbell = kgd_hqd_sdma_get_doorbell,
};
+1 −0
Original line number Diff line number Diff line
@@ -944,6 +944,7 @@ static void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr)
				drm_sched_entity_fini(entity);
			}
		}
		kref_put(&ctx->refcount, amdgpu_ctx_fini);
	}
}

+1 −0
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@
#include "amdgpu_ras.h"

MODULE_FIRMWARE("amdgpu/sdma_4_4_2.bin");
MODULE_FIRMWARE("amdgpu/sdma_4_4_4.bin");
MODULE_FIRMWARE("amdgpu/sdma_4_4_5.bin");

static const struct amdgpu_hwip_reg_entry sdma_reg_list_4_4_2[] = {
+6 −1
Original line number Diff line number Diff line
@@ -1543,8 +1543,13 @@ static int sdma_v5_0_reset_queue(struct amdgpu_ring *ring, unsigned int vmid)
{
	struct amdgpu_device *adev = ring->adev;
	u32 inst_id = ring->me;
	int r;

	amdgpu_amdkfd_suspend(adev, true);
	r = amdgpu_sdma_reset_engine(adev, inst_id);
	amdgpu_amdkfd_resume(adev, true);

	return amdgpu_sdma_reset_engine(adev, inst_id);
	return r;
}

static int sdma_v5_0_stop_queue(struct amdgpu_ring *ring)
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