Commit bfafa2c1 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'phy-for-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy 

Pull generic phy updates from Vinod Koul:
 "New Support:
   - Qualcomm sa8775p qmp-pcie, IPQ5018, and SC7280 qmp-ufs support
   - Mediatek MT8188 support

  Updates:
   - Device tree device_get_match_data() usage and dropping
     of_match_device() calls
   - Qualcomm qmp usb and combo phy updates for v6 register layout
   - Qualcomm eusb2-repeater updates for tuning overrides, regmap fields
   - STih407 usb binding and ralink usb-phy yaml conversion
   - renesas r8a779f0 serdes init sequencing updates"

* tag 'phy-for-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (32 commits)
  phy: Remove duplicated include in phy-ralink-usb.c
  phy: Kconfig: Select GENERIC_PHY for GENERIC_PHY_MIPI_DPHY
  phy: qcom-qmp-pcie: add endpoint support for sa8775p
  dt-bindings: phy: ralink-usb-phy: convert to dtschema
  dt-bindings: phy: Convert PXA1928 USB/HSIC PHY to DT schema
  phy: Drop unnecessary of_match_device() calls
  phy: rockchip-inno-usb2: Drop unnecessary DT includes
  phy: Use device_get_match_data()
  phy: realtek: Replace of_device.h with explicit includes
  phy: renesas: r8a779f0-ether-serdes: Add .exit() ops
  phy: renesas: r8a779f0-ether-serdes: Reset in .init()
  phy: qcom-qmp-combo: use v6 registers in v6 regs layout
  phy: qcom-qmp-usb: move PCS v6 register to the proper header
  phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers
  phy: sun4i-usb: update array size
  phy: qualcomm: phy-qcom-eusb2-repeater: Add tuning overrides
  phy: qualcomm: phy-qcom-eusb2-repeater: Zero out untouched tuning regs
  phy: qualcomm: phy-qcom-eusb2-repeater: Use regmap_fields
  dt-bindings: phy: qcom,snps-eusb2-repeater: Add magic tuning overrides
  dt-bindings: phy: Add compatible for Mediatek MT8188
  ...
parents d934aef6 d688c826

Documentation/devicetree/bindings/phy/marvell,pxa1928-usb-phy.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/marvell,pxa1928-usb-phy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Marvell PXA1928 USB/HSIC PHY



maintainers:

  - Duje Mihanović <duje.mihanovic@skole.hr>



properties:

  compatible:

    enum:

      - marvell,pxa1928-usb-phy

      - marvell,pxa1928-hsic-phy



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  '#phy-cells':

    const: 0



  resets:

    maxItems: 1



required:

  - compatible

  - reg

  - clocks

  - '#phy-cells'



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/marvell,pxa1928.h>



    usbphy: phy@7000 {

        compatible = "marvell,pxa1928-usb-phy";

        reg = <0x7000 0xe0>;

        clocks = <&apmu PXA1928_CLK_USB>;

        #phy-cells = <0>;

    };

Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml

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@@ -30,6 +30,7 @@ properties: 
          - const: mediatek,mt8173-mipi-tx

      - items:

          - enum:

              - mediatek,mt8188-mipi-tx

              - mediatek,mt8365-mipi-tx

          - const: mediatek,mt8183-mipi-tx

      - const: mediatek,mt2701-mipi-tx

Documentation/devicetree/bindings/phy/mediatek,mt7628-usbphy.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/mediatek,mt7628-usbphy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Mediatek/Ralink USB PHY



maintainers:

  - Sergio Paracuellos <sergio.paracuellos@gmail.com>



properties:

  compatible:

    enum:

      - mediatek,mt7620-usbphy

      - mediatek,mt7628-usbphy

      - ralink,rt3352-usbphy



  reg:

    maxItems: 1



  "#phy-cells":

    const: 0



  ralink,sysctl:

    description:

      phandle to a ralink syscon register region.

    $ref: /schemas/types.yaml#/definitions/phandle



  resets:

    items:

      - description: USB Host reset controller

      - description: USB Device reset controller



  reset-names:

    items:

      - const: host

      - const: device



required:

  - compatible

  - "#phy-cells"

  - ralink,sysctl

  - resets

  - reset-names



allOf:

  - if:

      properties:

        compatible:

          contains:

            const: mediatek,mt7628-usbphy

    then:

      required:

        - reg

    else:

      properties:

        reg: false



additionalProperties: false



examples:

  - |

    phy@10120000 {

      compatible = "mediatek,mt7628-usbphy";

      reg = <0x10120000 0x1000>;

      #phy-cells = <0>;

      ralink,sysctl = <&sysc>;

      resets = <&rstctrl 22>,

               <&rstctrl 25>;

      reset-names = "host", "device";

    };



...

Documentation/devicetree/bindings/phy/phy-stih407-usb.txt

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ST STiH407 USB PHY controller



This file documents the dt bindings for the usb picoPHY driver which is the PHY for both USB2 and USB3

host controllers (when controlling usb2/1.1 devices) available on STiH407 SoC family from STMicroelectronics.



Required properties:

- compatible		: should be "st,stih407-usb2-phy"

- st,syscfg		: phandle of sysconfig bank plus integer array containing phyparam and phyctrl register offsets

- resets		: list of phandle and reset specifier pairs. There should be two entries, one

			  for the whole phy and one for the port

- reset-names		: list of reset signal names. Should be "global" and "port"

See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml

See: Documentation/devicetree/bindings/reset/reset.txt



Example:



usb2_picophy0: usbpicophy@f8 {

	compatible	= "st,stih407-usb2-phy";

	#phy-cells	= <0>;

	st,syscfg	= <&syscfg_core 0x100 0xf4>;

	resets		= <&softreset STIH407_PICOPHY_SOFTRESET>,

			  <&picophyreset STIH407_PICOPHY0_RESET>;

	reset-names	= "global", "port";

};

Documentation/devicetree/bindings/phy/pxa1928-usb-phy.txt

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* Marvell PXA1928 USB and HSIC PHYs



Required properties:

- compatible: "marvell,pxa1928-usb-phy" or "marvell,pxa1928-hsic-phy"

- reg: base address and length of the registers

- clocks - A single clock. From common clock binding.

- #phys-cells: should be 0. From common phy binding.

- resets: reference to the reset controller



Example:



	usbphy: phy@7000 {

		compatible = "marvell,pxa1928-usb-phy";

		reg = <0x7000 0xe0>;

		clocks = <&apmu_clocks PXA1928_CLK_USB>;

		#phy-cells = <0>;

	};