Commit bfff3c66 authored by Borislav Petkov (AMD)'s avatar Borislav Petkov (AMD)
Browse files

x86/CPU/AMD: Move the DIV0 bug detection to the Zen1 init function

parent f69759be
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+3 −10
Original line number Diff line number Diff line
@@ -70,10 +70,6 @@ static const int amd_erratum_383[] =
static const int amd_erratum_1054[] =
	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf));

static const int amd_div0[] =
	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x00, 0x0, 0x2f, 0xf),
			   AMD_MODEL_RANGE(0x17, 0x50, 0x0, 0x5f, 0xf));

static const int amd_erratum_1485[] =
	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x19, 0x10, 0x0, 0x1f, 0xf),
			   AMD_MODEL_RANGE(0x19, 0x60, 0x0, 0xaf, 0xf));
@@ -1030,6 +1026,9 @@ static void init_amd_zen(struct cpuinfo_x86 *c)
		if (!cpu_has(c, X86_FEATURE_CPB))
			set_cpu_cap(c, X86_FEATURE_CPB);
	}

	pr_notice_once("AMD Zen1 DIV0 bug detected. Disable SMT for full protection.\n");
	setup_force_cpu_bug(X86_BUG_DIV0);
}

static bool cpu_has_zenbleed_microcode(void)
@@ -1067,7 +1066,6 @@ static void zen2_zenbleed_check(struct cpuinfo_x86 *c)
	} else {
		msr_clear_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT);
	}

}

static void init_amd_zen2(struct cpuinfo_x86 *c)
@@ -1219,11 +1217,6 @@ static void init_amd(struct cpuinfo_x86 *c)
	    cpu_has(c, X86_FEATURE_AUTOIBRS))
		WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS));

	if (cpu_has_amd_erratum(c, amd_div0)) {
		pr_notice_once("AMD Zen1 DIV0 bug detected. Disable SMT for full protection.\n");
		setup_force_cpu_bug(X86_BUG_DIV0);
	}

	if (!cpu_has(c, X86_FEATURE_HYPERVISOR) &&
	     cpu_has_amd_erratum(c, amd_erratum_1485))
		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT);