Commit c035e736 authored by Arkadiusz Kubalewski's avatar Arkadiusz Kubalewski Committed by Jakub Kicinski
Browse files

dpll: add phase-offset-monitor feature to netlink spec 



Add enum dpll_feature_state for control over features.

Add dpll device level attribute:
DPLL_A_PHASE_OFFSET_MONITOR - to allow control over a phase offset monitor
feature. Attribute is present and shall return current state of a feature
(enum dpll_feature_state), if the device driver provides such capability,
otherwie attribute shall not be present.

Reviewed-by: default avatarAleksandr Loktionov <aleksandr.loktionov@intel.com>
Reviewed-by: default avatarMilena Olech <milena.olech@intel.com>
Reviewed-by: default avatarJiri Pirko <jiri@nvidia.com>
Signed-off-by: default avatarArkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Acked-by: default avatarVadim Fedorenko <vadim.fedorenko@linux.dev>
Link: https://patch.msgid.link/20250612152835.1703397-2-arkadiusz.kubalewski@intel.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent bd1d76a6

Documentation/driver-api/dpll.rst

+18 −0
Original line number Diff line number Diff line
@@ -214,6 +214,24 @@ offset values are fractional with 3-digit decimal places and shell be 
divided with ``DPLL_PIN_PHASE_OFFSET_DIVIDER`` to get integer part and

modulo divided to get fractional part.



Phase offset monitor

====================



Phase offset measurement is typically performed against the current active

source. However, some DPLL (Digital Phase-Locked Loop) devices may offer

the capability to monitor phase offsets across all available inputs.

The attribute and current feature state shall be included in the response

message of the ``DPLL_CMD_DEVICE_GET`` command for supported DPLL devices.

In such cases, users can also control the feature using the

``DPLL_CMD_DEVICE_SET`` command by setting the ``enum dpll_feature_state``

values for the attribute.

Once enabled the phase offset measurements for the input shall be returned

in the ``DPLL_A_PIN_PHASE_OFFSET`` attribute.



  =============================== ========================

  ``DPLL_A_PHASE_OFFSET_MONITOR`` attr state of a feature

  =============================== ========================



Embedded SYNC

=============

Documentation/netlink/specs/dpll.yaml

+24 −0
Original line number Diff line number Diff line
@@ -240,6 +240,20 @@ definitions: 
      integer part of a measured phase offset value.

      Value of (DPLL_A_PHASE_OFFSET % DPLL_PHASE_OFFSET_DIVIDER) is a

      fractional part of a measured phase offset value.

  -

    type: enum

    name: feature-state

    doc: |

      Allow control (enable/disable) and status checking over features.

    entries:

      -

        name: disable

        doc: |

          feature shall be disabled

      -

        name: enable

        doc: |

          feature shall be enabled



attribute-sets:

  -
@@ -293,6 +307,14 @@ attribute-sets: 
          be put to message multiple times to indicate possible parallel

          quality levels (e.g. one specified by ITU option 1 and another

          one specified by option 2).

      -

        name: phase-offset-monitor

        type: u32

        enum: feature-state

        doc: Receive or request state of phase offset monitor feature.

          If enabled, dpll device shall monitor and notify all currently

          available inputs for changes of their phase offset against the

          dpll device.

  -

    name: pin

    enum-name: dpll_a_pin
@@ -483,6 +505,7 @@ operations: 
            - temp

            - clock-id

            - type

            - phase-offset-monitor



      dump:

        reply: *dev-attrs
@@ -499,6 +522,7 @@ operations: 
        request:

          attributes:

            - id

            - phase-offset-monitor

    -

      name: device-create-ntf

      doc: Notification about device appearing

drivers/dpll/dpll_nl.c

+3 −2
Original line number Diff line number Diff line
@@ -37,8 +37,9 @@ static const struct nla_policy dpll_device_get_nl_policy[DPLL_A_ID + 1] = { 
};



/* DPLL_CMD_DEVICE_SET - do */

static const struct nla_policy dpll_device_set_nl_policy[DPLL_A_ID + 1] = {

static const struct nla_policy dpll_device_set_nl_policy[DPLL_A_PHASE_OFFSET_MONITOR + 1] = {

	[DPLL_A_ID] = { .type = NLA_U32, },

	[DPLL_A_PHASE_OFFSET_MONITOR] = NLA_POLICY_MAX(NLA_U32, 1),

};



/* DPLL_CMD_PIN_ID_GET - do */
@@ -105,7 +106,7 @@ static const struct genl_split_ops dpll_nl_ops[] = { 
		.doit		= dpll_nl_device_set_doit,

		.post_doit	= dpll_post_doit,

		.policy		= dpll_device_set_nl_policy,

		.maxattr	= DPLL_A_ID,

		.maxattr	= DPLL_A_PHASE_OFFSET_MONITOR,

		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,

	},

	{

include/uapi/linux/dpll.h

+12 −0
Original line number Diff line number Diff line
@@ -192,6 +192,17 @@ enum dpll_pin_capabilities { 


#define DPLL_PHASE_OFFSET_DIVIDER	1000



/**

 * enum dpll_feature_state - Allow control (enable/disable) and status checking

 *   over features.

 * @DPLL_FEATURE_STATE_DISABLE: feature shall be disabled

 * @DPLL_FEATURE_STATE_ENABLE: feature shall be enabled

 */

enum dpll_feature_state {

	DPLL_FEATURE_STATE_DISABLE,

	DPLL_FEATURE_STATE_ENABLE,

};



enum dpll_a {

	DPLL_A_ID = 1,

	DPLL_A_MODULE_NAME,
@@ -204,6 +215,7 @@ enum dpll_a { 
	DPLL_A_TYPE,

	DPLL_A_LOCK_STATUS_ERROR,

	DPLL_A_CLOCK_QUALITY_LEVEL,

	DPLL_A_PHASE_OFFSET_MONITOR,



	__DPLL_A_MAX,

	DPLL_A_MAX = (__DPLL_A_MAX - 1)