Commit c0b357d5 authored by Wenmeng Liu's avatar Wenmeng Liu Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: talos: Add camss node 



Add node for the SM6150 camera subsystem.

Reviewed-by: default avatarVladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: default avatarWenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260305-sm6150_evk-v6-2-38ce4360d5e0@oss.qualcomm.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 1bb533d6

arch/arm64/boot/dts/qcom/talos.dtsi

+200 −0
Original line number Diff line number Diff line
@@ -3955,6 +3955,206 @@ videocc: clock-controller@ab00000 { 
			#power-domain-cells = <1>;

		};



		camss: isp@acb3000 {

			compatible = "qcom,sm6150-camss";



			reg = <0x0 0x0acb3000 0x0 0x1000>,

			      <0x0 0x0acba000 0x0 0x1000>,

			      <0x0 0x0acc8000 0x0 0x1000>,

			      <0x0 0x0ac65000 0x0 0x1000>,

			      <0x0 0x0ac66000 0x0 0x1000>,

			      <0x0 0x0ac67000 0x0 0x1000>,

			      <0x0 0x0acaf000 0x0 0x4000>,

			      <0x0 0x0acb6000 0x0 0x4000>,

			      <0x0 0x0acc4000 0x0 0x4000>,

			      <0x0 0x0ac6f000 0x0 0x3000>,

			      <0x0 0x0ac42000 0x0 0x5000>,

			      <0x0 0x0ac48000 0x0 0x1000>,

			      <0x0 0x0ac40000 0x0 0x1000>,

			      <0x0 0x0ac18000 0x0 0x3000>,

			      <0x0 0x0ac00000 0x0 0x6000>,

			      <0x0 0x0ac10000 0x0 0x8000>,

			      <0x0 0x0ac87000 0x0 0x3000>,

			      <0x0 0x0ac52000 0x0 0x4000>,

			      <0x0 0x0ac4e000 0x0 0x4000>,

			      <0x0 0x0ac6b000 0x0 0x0a00>;

			reg-names = "csid0",

				    "csid1",

				    "csid_lite",

				    "csiphy0",

				    "csiphy1",

				    "csiphy2",

				    "vfe0",

				    "vfe1",

				    "vfe_lite",

				    "bps",

				    "camnoc",

				    "cpas_cdm",

				    "cpas_top",

				    "icp_csr",

				    "icp_qgic",

				    "icp_sierra",

				    "ipe0",

				    "jpeg_dma",

				    "jpeg_enc",

				    "lrme";



			clocks = <&gcc GCC_CAMERA_AHB_CLK>,

				 <&gcc GCC_CAMERA_HF_AXI_CLK>,

				 <&camcc CAM_CC_CAMNOC_AXI_CLK>,

				 <&camcc CAM_CC_CPAS_AHB_CLK>,

				 <&camcc CAM_CC_CSIPHY0_CLK>,

				 <&camcc CAM_CC_CSI0PHYTIMER_CLK>,

				 <&camcc CAM_CC_CSIPHY1_CLK>,

				 <&camcc CAM_CC_CSI1PHYTIMER_CLK>,

				 <&camcc CAM_CC_CSIPHY2_CLK>,

				 <&camcc CAM_CC_CSI2PHYTIMER_CLK>,

				 <&camcc CAM_CC_SOC_AHB_CLK>,

				 <&camcc CAM_CC_IFE_0_CLK>,

				 <&camcc CAM_CC_IFE_0_AXI_CLK>,

				 <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>,

				 <&camcc CAM_CC_IFE_0_CSID_CLK>,

				 <&camcc CAM_CC_IFE_1_CLK>,

				 <&camcc CAM_CC_IFE_1_AXI_CLK>,

				 <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>,

				 <&camcc CAM_CC_IFE_1_CSID_CLK>,

				 <&camcc CAM_CC_IFE_LITE_CLK>,

				 <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,

				 <&camcc CAM_CC_IFE_LITE_CSID_CLK>,

				 <&camcc CAM_CC_BPS_CLK>,

				 <&camcc CAM_CC_BPS_AHB_CLK>,

				 <&camcc CAM_CC_BPS_AXI_CLK>,

				 <&camcc CAM_CC_BPS_AREG_CLK>,

				 <&camcc CAM_CC_ICP_CLK>,

				 <&camcc CAM_CC_IPE_0_CLK>,

				 <&camcc CAM_CC_IPE_0_AHB_CLK>,

				 <&camcc CAM_CC_IPE_0_AREG_CLK>,

				 <&camcc CAM_CC_IPE_0_AXI_CLK>,

				 <&camcc CAM_CC_JPEG_CLK>,

				 <&camcc CAM_CC_LRME_CLK>;

			clock-names = "gcc_ahb",

				      "gcc_axi_hf",

				      "camnoc_axi",

				      "cpas_ahb",

				      "csiphy0",

				      "csiphy0_timer",

				      "csiphy1",

				      "csiphy1_timer",

				      "csiphy2",

				      "csiphy2_timer",

				      "soc_ahb",

				      "vfe0",

				      "vfe0_axi",

				      "vfe0_cphy_rx",

				      "vfe0_csid",

				      "vfe1",

				      "vfe1_axi",

				      "vfe1_cphy_rx",

				      "vfe1_csid",

				      "vfe_lite",

				      "vfe_lite_cphy_rx",

				      "vfe_lite_csid",

				      "bps",

				      "bps_ahb",

				      "bps_axi",

				      "bps_areg",

				      "icp",

				      "ipe0",

				      "ipe0_ahb",

				      "ipe0_areg",

				      "ipe0_axi",

				      "jpeg",

				      "lrme";



			interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY

					 &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,

					<&mmss_noc MASTER_CAMNOC_HF0 QCOM_ICC_TAG_ALWAYS

					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,

					<&mmss_noc MASTER_CAMNOC_HF1 QCOM_ICC_TAG_ALWAYS

					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,

					<&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS

					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;

			interconnect-names = "ahb",

					     "hf_0",

					     "hf_1",

					     "sf_mnoc";



			interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 466 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 468 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 477 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 478 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 479 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 465 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 467 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 469 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 459 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 461 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 463 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 475 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 474 IRQ_TYPE_EDGE_RISING 0>,

				     <GIC_SPI 476 IRQ_TYPE_EDGE_RISING 0>;

			interrupt-names = "csid0",

					  "csid1",

					  "csid_lite",

					  "csiphy0",

					  "csiphy1",

					  "csiphy2",

					  "vfe0",

					  "vfe1",

					  "vfe_lite",

					  "camnoc",

					  "cdm",

					  "icp",

					  "jpeg_dma",

					  "jpeg_enc",

					  "lrme";



			iommus = <&apps_smmu 0x0820 0x40>,

				 <&apps_smmu 0x0840 0x00>,

				 <&apps_smmu 0x0860 0x40>,

				 <&apps_smmu 0x0c00 0x00>,

				 <&apps_smmu 0x0cc0 0x00>,

				 <&apps_smmu 0x0c80 0x00>,

				 <&apps_smmu 0x0ca0 0x00>,

				 <&apps_smmu 0x0d00 0x00>,

				 <&apps_smmu 0x0d20 0x00>,

				 <&apps_smmu 0x0d40 0x00>,

				 <&apps_smmu 0x0d80 0x20>,

				 <&apps_smmu 0x0da0 0x20>,

				 <&apps_smmu 0x0de2 0x00>;



			power-domains = <&camcc IFE_0_GDSC>,

					<&camcc IFE_1_GDSC>,

					<&camcc TITAN_TOP_GDSC>,

					<&camcc BPS_GDSC>,

					<&camcc IPE_0_GDSC>;

			power-domain-names = "ife0",

					     "ife1",

					     "top",

					     "bps",

					     "ipe";



			status = "disabled";



			ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

				};



				port@1 {

					reg = <1>;

				};



				port@2 {

					reg = <2>;

				};

			};

		};



		camcc: clock-controller@ad00000 {

			compatible = "qcom,qcs615-camcc";

			reg = <0 0x0ad00000 0 0x10000>;