Commit c0d6f52f authored by Charlene Liu's avatar Charlene Liu Committed by Alex Deucher
Browse files

drm/amd/display: Remove unused code 



[why]
two sets of dccg_init:
one in dc/dccg, one in dc/hwss.
remove hwss's dccg_init for asics not use it.

Reviewed-by: default avatarChris Park <chris.park@amd.com>
Reviewed-by: default avatarDillon Varone <dillon.varone@amd.com>
Signed-off-by: default avatarCharlene Liu <Charlene.Liu@amd.com>
Signed-off-by: default avatarIlya Bakoulin <Ilya.Bakoulin@amd.com>
Signed-off-by: default avatarMatthew Stewart <matthew.stewart2@amd.com>
Tested-by: default avatarDan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4589712e

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

+0 −2
Original line number Diff line number Diff line
@@ -3145,8 +3145,6 @@ void dcn20_fpga_init_hw(struct dc *dc) 
	REG_WRITE(RBBMIF_TIMEOUT_DIS, 0xFFFFFFFF);

	REG_WRITE(RBBMIF_TIMEOUT_DIS_2, 0xFFFFFFFF);



	hws->funcs.dccg_init(hws);



	REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, 2);

	REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1);

	if (REG(REFCLK_CNTL))

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_init.c

+0 −1
Original line number Diff line number Diff line
@@ -143,7 +143,6 @@ static const struct hwseq_private_funcs dcn30_private_funcs = { 
	.set_hdr_multiplier = dcn10_set_hdr_multiplier,

	.verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,

	.wait_for_blank_complete = dcn20_wait_for_blank_complete,

	.dccg_init = dcn20_dccg_init,

	.set_blend_lut = dcn30_set_blend_lut,

	.set_shaper_3dlut = dcn20_set_shaper_3dlut,

};

drivers/gpu/drm/amd/display/dc/hwss/dcn301/dcn301_init.c

+0 −1
Original line number Diff line number Diff line
@@ -140,7 +140,6 @@ static const struct hwseq_private_funcs dcn301_private_funcs = { 
	.set_hdr_multiplier = dcn10_set_hdr_multiplier,

	.verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,

	.wait_for_blank_complete = dcn20_wait_for_blank_complete,

	.dccg_init = dcn20_dccg_init,

	.set_blend_lut = dcn30_set_blend_lut,

	.set_shaper_3dlut = dcn20_set_shaper_3dlut,

};

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_init.c

+0 −1
Original line number Diff line number Diff line
@@ -144,7 +144,6 @@ static const struct hwseq_private_funcs dcn31_private_funcs = { 
	.set_hdr_multiplier = dcn10_set_hdr_multiplier,

	.verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,

	.wait_for_blank_complete = dcn20_wait_for_blank_complete,

	.dccg_init = dcn20_dccg_init,

	.set_blend_lut = dcn30_set_blend_lut,

	.set_shaper_3dlut = dcn20_set_shaper_3dlut,

	.setup_hpo_hw_control = dcn31_setup_hpo_hw_control,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_init.c

+0 −1
Original line number Diff line number Diff line
@@ -149,7 +149,6 @@ static const struct hwseq_private_funcs dcn314_private_funcs = { 
	.set_hdr_multiplier = dcn10_set_hdr_multiplier,

	.verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,

	.wait_for_blank_complete = dcn20_wait_for_blank_complete,

	.dccg_init = dcn20_dccg_init,

	.set_blend_lut = dcn30_set_blend_lut,

	.set_shaper_3dlut = dcn20_set_shaper_3dlut,

	.setup_hpo_hw_control = dcn31_setup_hpo_hw_control,