Commit c0f1506f authored by Koichiro Den's avatar Koichiro Den Committed by Manivannan Sadhasivam
Browse files

PCI: dwc: Advertise dynamic inbound mapping support 



The DesignWare EP core has supported updating the inbound iATU mapping
for an already configured BAR (i.e. allowing pci_epc_set_bar() to be
called again without a prior pci_epc_clear_bar()) since
commit 4284c88f ("PCI: designware-ep: Allow pci_epc_set_bar() update
inbound map address").

Now that this capability is exposed via the dynamic_inbound_mapping EPC
feature bit, set it for DWC-based EP glue drivers using a common
initializer macro to avoid duplicating the same flag in each driver.

Note that pci-layerscape-ep.c is untouched. It currently constructs the
feature struct dynamically in ls_pcie_ep_init(). Once converted to a
static feature definition, it will use DWC_EPC_COMMON_FEATURES as well.

Signed-off-by: default avatarKoichiro Den <den@valinux.co.jp>
Signed-off-by: default avatarManivannan Sadhasivam <mani@kernel.org>
Reviewed-by: default avatarNiklas Cassel <cassel@kernel.org>
Reviewed-by: default avatarFrank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260124145012.2794108-4-den@valinux.co.jp
parent 31fb9540

drivers/pci/controller/dwc/pci-dra7xx.c

+1 −0
Original line number Diff line number Diff line
@@ -424,6 +424,7 @@ static int dra7xx_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no, 
}



static const struct pci_epc_features dra7xx_pcie_epc_features = {

	DWC_EPC_COMMON_FEATURES,

	.linkup_notifier = true,

	.msi_capable = true,

};

drivers/pci/controller/dwc/pci-imx6.c

+3 −0
Original line number Diff line number Diff line
@@ -1388,6 +1388,7 @@ static int imx_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, 
}



static const struct pci_epc_features imx8m_pcie_epc_features = {

	DWC_EPC_COMMON_FEATURES,

	.msi_capable = true,

	.bar[BAR_1] = { .type = BAR_RESERVED, },

	.bar[BAR_3] = { .type = BAR_RESERVED, },
@@ -1397,6 +1398,7 @@ static const struct pci_epc_features imx8m_pcie_epc_features = { 
};



static const struct pci_epc_features imx8q_pcie_epc_features = {

	DWC_EPC_COMMON_FEATURES,

	.msi_capable = true,

	.bar[BAR_1] = { .type = BAR_RESERVED, },

	.bar[BAR_3] = { .type = BAR_RESERVED, },
@@ -1417,6 +1419,7 @@ static const struct pci_epc_features imx8q_pcie_epc_features = { 
 * BAR5	| Enable   | 32-bit  | 64 KB   | Programmable Size

 */

static const struct pci_epc_features imx95_pcie_epc_features = {

	DWC_EPC_COMMON_FEATURES,

	.msi_capable = true,

	.bar[BAR_1] = { .type = BAR_FIXED, .fixed_size = SZ_64K, },

	.align = SZ_4K,

drivers/pci/controller/dwc/pci-keystone.c

+1 −0
Original line number Diff line number Diff line
@@ -930,6 +930,7 @@ static int ks_pcie_am654_raise_irq(struct dw_pcie_ep *ep, u8 func_no, 
}



static const struct pci_epc_features ks_pcie_am654_epc_features = {

	DWC_EPC_COMMON_FEATURES,

	.msi_capable = true,

	.msix_capable = true,

	.bar[BAR_0] = { .type = BAR_RESERVED, },

drivers/pci/controller/dwc/pcie-artpec6.c

+1 −0
Original line number Diff line number Diff line
@@ -370,6 +370,7 @@ static int artpec6_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no, 
}



static const struct pci_epc_features artpec6_pcie_epc_features = {

	DWC_EPC_COMMON_FEATURES,

	.msi_capable = true,

};

drivers/pci/controller/dwc/pcie-designware-plat.c

+1 −0
Original line number Diff line number Diff line
@@ -61,6 +61,7 @@ static int dw_plat_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, 
}



static const struct pci_epc_features dw_plat_pcie_epc_features = {

	DWC_EPC_COMMON_FEATURES,

	.msi_capable = true,

	.msix_capable = true,

};