Commit c156fe2d authored by Aleksandrs Vinarskis's avatar Aleksandrs Vinarskis Committed by Dmitry Baryshkov
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drm/msm/dp: Account for LTTPRs capabilities 



Take into account LTTPR capabilities when selecting maximum allowed
link rate, number of data lines.

Fixes: 72d0af4a ("drm/msm/dp: Add support for LTTPR handling")
Reviewed-by: default avatarAbel Vesa <abel.vesa@linaro.org>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: default avatarAleksandrs Vinarskis <alex.vinarskis@gmail.com>
Tested-by: Jessica Zhang <quic_jesszhan@quicinc.com> # SA8775P
Tested-by: default avatarJohan Hovold <johan+linaro@kernel.org>
Tested-by: default avatarRob Clark <robdclark@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/652302/
Link: https://lore.kernel.org/r/20250507230113.14270-3-alex.vinarskis@gmail.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
parent 9351d3d3

drivers/gpu/drm/msm/dp/dp_display.c

+2 −3
Original line number Diff line number Diff line
@@ -362,13 +362,12 @@ static int msm_dp_display_send_hpd_notification(struct msm_dp_display_private *d 


static void msm_dp_display_lttpr_init(struct msm_dp_display_private *dp, u8 *dpcd)

{

	u8 lttpr_caps[DP_LTTPR_COMMON_CAP_SIZE];

	int rc;



	if (drm_dp_read_lttpr_common_caps(dp->aux, dpcd, lttpr_caps))

	if (drm_dp_read_lttpr_common_caps(dp->aux, dpcd, dp->link->lttpr_common_caps))

		return;



	rc = drm_dp_lttpr_init(dp->aux, drm_dp_lttpr_count(lttpr_caps));

	rc = drm_dp_lttpr_init(dp->aux, drm_dp_lttpr_count(dp->link->lttpr_common_caps));

	if (rc)

		DRM_ERROR("failed to set LTTPRs transparency mode, rc=%d\n", rc);

}

drivers/gpu/drm/msm/dp/dp_link.h

+3 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#define _DP_LINK_H_



#include "dp_aux.h"

#include <drm/display/drm_dp_helper.h>



#define DS_PORT_STATUS_CHANGED 0x200

#define DP_TEST_BIT_DEPTH_UNKNOWN 0xFFFFFFFF
@@ -60,6 +61,8 @@ struct msm_dp_link_phy_params { 
};



struct msm_dp_link {

	u8 lttpr_common_caps[DP_LTTPR_COMMON_CAP_SIZE];



	u32 sink_request;

	u32 test_response;

drivers/gpu/drm/msm/dp/dp_panel.c

+11 −1
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ static void msm_dp_panel_read_psr_cap(struct msm_dp_panel_private *panel) 


static int msm_dp_panel_read_dpcd(struct msm_dp_panel *msm_dp_panel)

{

	int rc;

	int rc, max_lttpr_lanes, max_lttpr_rate;

	struct msm_dp_panel_private *panel;

	struct msm_dp_link_info *link_info;

	u8 *dpcd, major, minor;
@@ -75,6 +75,16 @@ static int msm_dp_panel_read_dpcd(struct msm_dp_panel *msm_dp_panel) 
	if (link_info->rate > msm_dp_panel->max_dp_link_rate)

		link_info->rate = msm_dp_panel->max_dp_link_rate;



	/* Limit data lanes from LTTPR capabilities, if any */

	max_lttpr_lanes = drm_dp_lttpr_max_lane_count(panel->link->lttpr_common_caps);

	if (max_lttpr_lanes && max_lttpr_lanes < link_info->num_lanes)

		link_info->num_lanes = max_lttpr_lanes;



	/* Limit link rate from LTTPR capabilities, if any */

	max_lttpr_rate = drm_dp_lttpr_max_link_rate(panel->link->lttpr_common_caps);

	if (max_lttpr_rate && max_lttpr_rate < link_info->rate)

		link_info->rate = max_lttpr_rate;



	drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor);

	drm_dbg_dp(panel->drm_dev, "link_rate=%d\n", link_info->rate);

	drm_dbg_dp(panel->drm_dev, "lane_count=%d\n", link_info->num_lanes);