Commit c17aecf8 authored by Liming Sun's avatar Liming Sun Committed by Ulf Hansson
Browse files

mmc: dw_mmc-bluefield: Add support for eMMC HW reset 



The eMMC RST_N register is implemented as secure register on the BlueField
SoC and controlled by TF-A. This commit sends an SMC call to TF-A for the
eMMC HW reset.

Reviewed-by: default avatarDavid Thompson <davthompson@nvidia.com>
Signed-off-by: default avatarLiming Sun <limings@nvidia.com>
Link: https://lore.kernel.org/r/2c459196c6867e325f9386ec0559efea464cfdd6.1718213918.git.limings@nvidia.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent f21adcb8

drivers/mmc/host/dw_mmc-bluefield.c

+17 −1
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
 * Copyright (C) 2018 Mellanox Technologies.

 */



#include <linux/arm-smccc.h>

#include <linux/bitfield.h>

#include <linux/bitops.h>

#include <linux/mmc/host.h>
@@ -20,6 +21,9 @@ 
#define BLUEFIELD_UHS_REG_EXT_SAMPLE	2

#define BLUEFIELD_UHS_REG_EXT_DRIVE	4



/* SMC call for RST_N */

#define BLUEFIELD_SMC_SET_EMMC_RST_N	0x82000007



static void dw_mci_bluefield_set_ios(struct dw_mci *host, struct mmc_ios *ios)

{

	u32 reg;
@@ -34,8 +38,20 @@ static void dw_mci_bluefield_set_ios(struct dw_mci *host, struct mmc_ios *ios) 
	mci_writel(host, UHS_REG_EXT, reg);

}



static void dw_mci_bluefield_hw_reset(struct dw_mci *host)

{

		struct arm_smccc_res res = { 0 };



		arm_smccc_smc(BLUEFIELD_SMC_SET_EMMC_RST_N, 0, 0, 0, 0, 0, 0, 0,

			      &res);



		if (res.a0)

			pr_err("RST_N failed.\n");

}



static const struct dw_mci_drv_data bluefield_drv_data = {

	.set_ios		= dw_mci_bluefield_set_ios

	.set_ios		= dw_mci_bluefield_set_ios,

	.hw_reset		= dw_mci_bluefield_hw_reset

};



static const struct of_device_id dw_mci_bluefield_match[] = {