Commit c184d44a authored by Frank Li's avatar Frank Li Committed by Rob Herring (Arm)
Browse files

dt-bindings: interrupt-controller: convert fsl,ls-scfg-msi to yaml 



Convert device tree binding fsl,ls-scfg-msi to yaml format.

Additional changes:
- Include gic.h and use predefined macro in example.
- Remove label in example.
- Change node name to interrupt-controller in example.
- Fix error in example.
- ls1046a allow 4 irqs, other platform only 1 irq.
- Add $ref: msi-controller.yaml
- Add #msi-cells.

Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240627144207.4003708-1-Frank.Li@nxp.com


Signed-off-by: default avatarRob Herring (Arm) <robh@kernel.org>
parent 304a90c4

Documentation/devicetree/bindings/interrupt-controller/fsl,ls-msi.yaml

0 → 100644
+79 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-msi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Freescale Layerscape SCFG PCIe MSI controller



description: |

  This interrupt controller hardware is a second level interrupt controller that

  is hooked to a parent interrupt controller: e.g: ARM GIC for ARM-based

  platforms. If interrupt-parent is not provided, the default parent interrupt

  controller will be used.



  Each PCIe node needs to have property msi-parent that points to

  MSI controller node



maintainers:

  - Frank Li <Frank.Li@nxp.com>



properties:

  compatible:

    enum:

      - fsl,ls1012a-msi

      - fsl,ls1021a-msi

      - fsl,ls1043a-msi

      - fsl,ls1043a-v1.1-msi

      - fsl,ls1046a-msi



  reg:

    maxItems: 1



  '#msi-cells':

    const: 1



  interrupts:

    items:

      - description: Shared MSI interrupt group 0

      - description: Shared MSI interrupt group 1

      - description: Shared MSI interrupt group 2

      - description: Shared MSI interrupt group 3

    minItems: 1



required:

  - compatible

  - reg

  - msi-controller

  - interrupts



allOf:

  - $ref: msi-controller.yaml

  - if:

      properties:

        compatible:

          contains:

            enum:

              - fsl,ls1046a-msi

    then:

      properties:

        interrupts:

          minItems: 4

    else:

      properties:

        interrupts:

          maxItems: 1



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    interrupt-controller@1571000 {

        compatible = "fsl,ls1043a-msi";

        reg = <0x1571000 0x8>;

        msi-controller;

        #msi-cells = <1>;

        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;

    };

Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt

deleted100644 → 0
+0 −30
Original line number Diff line number Diff line 
* Freescale Layerscape SCFG PCIe MSI controller



Required properties:



- compatible: should be "fsl,<soc-name>-msi" to identify

	      Layerscape PCIe MSI controller block such as:

              "fsl,ls1021a-msi"

              "fsl,ls1043a-msi"

              "fsl,ls1046a-msi"

              "fsl,ls1043a-v1.1-msi"

              "fsl,ls1012a-msi"

- msi-controller: indicates that this is a PCIe MSI controller node

- reg: physical base address of the controller and length of memory mapped.

- interrupts: an interrupt to the parent interrupt controller.



This interrupt controller hardware is a second level interrupt controller that

is hooked to a parent interrupt controller: e.g: ARM GIC for ARM-based

platforms. If interrupt-parent is not provided, the default parent interrupt

controller will be used.

Each PCIe node needs to have property msi-parent that points to

MSI controller node



Examples:



	msi1: msi-controller@1571000 {

		compatible = "fsl,ls1043a-msi";

		reg = <0x0 0x1571000 0x0 0x8>,

		msi-controller;

		interrupts = <0 116 0x4>;

	};