Commit c1beb6f7 authored by Rex Nie's avatar Rex Nie Committed by Abhinav Kumar
Browse files

drm/msm/hdmi: simplify code in pll_get_integloop_gain 



In pll_get_integloop_gain(), digclk_divsel=1 or 2, base=63 or 196ULL,
so the base may be 63, 126, 196, 392. The condition base <= 2046
always true.

Fixes: caedbf17 ("drm/msm: add msm8998 hdmi phy/pll support")
Signed-off-by: default avatarRex Nie <rex.nie@jaguarmicro.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/624153/
Link: https://lore.kernel.org/r/20241112074101.2206-1-rex.nie@jaguarmicro.com


Signed-off-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
parent 3b08796f

drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c

+1 −1
Original line number Diff line number Diff line
@@ -137,7 +137,7 @@ static inline u32 pll_get_integloop_gain(u64 frac_start, u64 bclk, u32 ref_clk, 


	base <<= (digclk_divsel == 2 ? 1 : 0);



	return (base <= 2046 ? base : 2046);

	return base;

}



static inline u32 pll_get_pll_cmp(u64 fdata, unsigned long ref_clk)