Commit c21b90f7 authored by Prathyushi Nangia's avatar Prathyushi Nangia Committed by Linus Torvalds
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x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache 



Make sure resources are not improperly shared in the op cache and
cause instruction corruption this way.

Signed-off-by: default avatarPrathyushi Nangia <prathyushi.nangia@amd.com>
Co-developed-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 50897c95

arch/x86/include/asm/msr-index.h

+2 −1
Original line number Diff line number Diff line
@@ -806,6 +806,7 @@ 
#define MSR_ZEN4_BP_CFG			0xc001102e

#define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4

#define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5

#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33



/* Fam 19h MSRs */

#define MSR_F19H_UMC_PERF_CTL           0xc0010800

arch/x86/kernel/cpu/amd.c

+3 −0
Original line number Diff line number Diff line
@@ -989,6 +989,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c) 


	/* Correct misconfigured CPUID on some clients. */

	clear_cpu_cap(c, X86_FEATURE_INVLPGB);



	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))

		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);

}



static void init_amd_zen3(struct cpuinfo_x86 *c)

tools/arch/x86/include/asm/msr-index.h

+2 −1
Original line number Diff line number Diff line
@@ -796,6 +796,7 @@ 
#define MSR_ZEN4_BP_CFG			0xc001102e

#define MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT 4

#define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5

#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT	33



/* Fam 19h MSRs */

#define MSR_F19H_UMC_PERF_CTL           0xc0010800