Commit c2f3e10a authored by Amit Cohen's avatar Amit Cohen Committed by David S. Miller
Browse files

mlxsw: Add 'ipv4_5' flex key 



Currently virtual router ID element is broken to two sub-elements -
'VIRT_ROUTER_LSB' and 'VIRT_ROUTER_MSB'. It was broken as this field is
broken in 'ipv4_4' flex key which is used for IPv4 in Spectrum < 4.
For Spectrum-4, we use 'ipv4_4b' flex key which contains one field for
virtual router, this key is not supported in older ASICs.

Add 'ipv4_5' flex key which is supported in all ASICs and contains one
field for virtual router. Then there is no reason to use 'VIRT_ROUTER_LSB'
and 'VIRT_ROUTER_MSB', remove them and add one element 'VIRT_ROUTER' for
this field.

The motivation is to get rid of 'ipv4_4' flex key, as it might be chosen
for IPv6 multicast forwarding region. This will not allow the improvement
in a following patch. See more details in the cover letter and in a
following patch.

Signed-off-by: default avatarAmit Cohen <amcohen@nvidia.com>
Reviewed-by: default avatarIdo Schimmel <idosch@nvidia.com>
Signed-off-by: default avatarPetr Machata <petrm@nvidia.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 84c19e65

drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.c

+1 −2
Original line number Diff line number Diff line
@@ -32,8 +32,7 @@ static const struct mlxsw_afk_element_info mlxsw_afk_element_infos[] = { 
	MLXSW_AFK_ELEMENT_INFO_U32(IP_TTL_, 0x18, 0, 8),

	MLXSW_AFK_ELEMENT_INFO_U32(IP_ECN, 0x18, 9, 2),

	MLXSW_AFK_ELEMENT_INFO_U32(IP_DSCP, 0x18, 11, 6),

	MLXSW_AFK_ELEMENT_INFO_U32(VIRT_ROUTER_MSB, 0x18, 17, 4),

	MLXSW_AFK_ELEMENT_INFO_U32(VIRT_ROUTER_LSB, 0x18, 21, 8),

	MLXSW_AFK_ELEMENT_INFO_U32(VIRT_ROUTER, 0x18, 17, 12),

	MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_96_127, 0x20, 4),

	MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_64_95, 0x24, 4),

	MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_32_63, 0x28, 4),

drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h

+1 −2
Original line number Diff line number Diff line
@@ -33,8 +33,7 @@ enum mlxsw_afk_element { 
	MLXSW_AFK_ELEMENT_IP_TTL_,

	MLXSW_AFK_ELEMENT_IP_ECN,

	MLXSW_AFK_ELEMENT_IP_DSCP,

	MLXSW_AFK_ELEMENT_VIRT_ROUTER_MSB,

	MLXSW_AFK_ELEMENT_VIRT_ROUTER_LSB,

	MLXSW_AFK_ELEMENT_VIRT_ROUTER,

	MLXSW_AFK_ELEMENT_FDB_MISS,

	MLXSW_AFK_ELEMENT_L4_PORT_RANGE,

	MLXSW_AFK_ELEMENT_MAX,

drivers/net/ethernet/mellanox/mlxsw/spectrum2_mr_tcam.c

+4 −9
Original line number Diff line number Diff line
@@ -45,8 +45,7 @@ static int mlxsw_sp2_mr_tcam_bind_group(struct mlxsw_sp *mlxsw_sp, 
}



static const enum mlxsw_afk_element mlxsw_sp2_mr_tcam_usage_ipv4[] = {

		MLXSW_AFK_ELEMENT_VIRT_ROUTER_MSB,

		MLXSW_AFK_ELEMENT_VIRT_ROUTER_LSB,

		MLXSW_AFK_ELEMENT_VIRT_ROUTER,

		MLXSW_AFK_ELEMENT_SRC_IP_0_31,

		MLXSW_AFK_ELEMENT_DST_IP_0_31,

};
@@ -89,8 +88,7 @@ static void mlxsw_sp2_mr_tcam_ipv4_fini(struct mlxsw_sp2_mr_tcam *mr_tcam) 
}



static const enum mlxsw_afk_element mlxsw_sp2_mr_tcam_usage_ipv6[] = {

		MLXSW_AFK_ELEMENT_VIRT_ROUTER_MSB,

		MLXSW_AFK_ELEMENT_VIRT_ROUTER_LSB,

		MLXSW_AFK_ELEMENT_VIRT_ROUTER,

		MLXSW_AFK_ELEMENT_SRC_IP_96_127,

		MLXSW_AFK_ELEMENT_SRC_IP_64_95,

		MLXSW_AFK_ELEMENT_SRC_IP_32_63,
@@ -189,11 +187,8 @@ mlxsw_sp2_mr_tcam_rule_parse(struct mlxsw_sp_acl_rule *rule, 


	rulei = mlxsw_sp_acl_rule_rulei(rule);

	rulei->priority = priority;

	mlxsw_sp_acl_rulei_keymask_u32(rulei, MLXSW_AFK_ELEMENT_VIRT_ROUTER_LSB,

				       key->vrid, GENMASK(7, 0));

	mlxsw_sp_acl_rulei_keymask_u32(rulei,

				       MLXSW_AFK_ELEMENT_VIRT_ROUTER_MSB,

				       key->vrid >> 8, GENMASK(3, 0));

	mlxsw_sp_acl_rulei_keymask_u32(rulei, MLXSW_AFK_ELEMENT_VIRT_ROUTER,

				       key->vrid, GENMASK(11, 0));

	switch (key->proto) {

	case MLXSW_SP_L3_PROTO_IPV4:

		return mlxsw_sp2_mr_tcam_rule_parse4(rulei, key);

drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c

+4 −6
Original line number Diff line number Diff line
@@ -171,9 +171,8 @@ static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_2[] = { 
	MLXSW_AFK_ELEMENT_INST_U32(IP_PROTO, 0x04, 16, 8),

};



static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_4[] = {

	MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER_LSB, 0x04, 24, 8),

	MLXSW_AFK_ELEMENT_INST_EXT_U32(VIRT_ROUTER_MSB, 0x00, 0, 3, 0, true),

static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_5[] = {

	MLXSW_AFK_ELEMENT_INST_EXT_U32(VIRT_ROUTER, 0x04, 20, 11, 0, true),

};



static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_0[] = {
@@ -220,7 +219,7 @@ static const struct mlxsw_afk_block mlxsw_sp2_afk_blocks[] = { 
	MLXSW_AFK_BLOCK(0x38, mlxsw_sp_afk_element_info_ipv4_0),

	MLXSW_AFK_BLOCK(0x39, mlxsw_sp_afk_element_info_ipv4_1),

	MLXSW_AFK_BLOCK(0x3A, mlxsw_sp_afk_element_info_ipv4_2),

	MLXSW_AFK_BLOCK(0x3C, mlxsw_sp_afk_element_info_ipv4_4),

	MLXSW_AFK_BLOCK(0x3D, mlxsw_sp_afk_element_info_ipv4_5),

	MLXSW_AFK_BLOCK(0x40, mlxsw_sp_afk_element_info_ipv6_0),

	MLXSW_AFK_BLOCK(0x41, mlxsw_sp_afk_element_info_ipv6_1),

	MLXSW_AFK_BLOCK(0x42, mlxsw_sp_afk_element_info_ipv6_2),
@@ -323,8 +322,7 @@ static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_5b[] = { 
};



static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_4b[] = {

	MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER_LSB, 0x04, 13, 8),

	MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER_MSB, 0x04, 21, 4),

	MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER, 0x04, 13, 12),

};



static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_2b[] = {