Commit c2f6a472 authored by Abhimanyu Saini's avatar Abhimanyu Saini Committed by Shawn Guo
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arm64: dts: freescale: ls2080a: Split devicetree for code resuability



LS2088A and LS2080A are similar SoCs with a few differences like
ARM cores etc.

Reorganize the LS2080A device tree to move the common nodes to:
        - fsl-ls208xa.dtsi
        - fsl-ls208xa-rdb.dtsi
        - fsl-ls208xa-qds.dtsi

Signed-off-by: default avatarPriyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: default avatarAshish Kumar <ashish.kumar@nxp.com>
Signed-off-by: default avatarAbhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 67972c55
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+3 −152
Original line number Diff line number Diff line
/*
 * Device Tree file for Freescale LS2080a QDS Board.
 *
 * Copyright (C) 2015, Freescale Semiconductor
 * Copyright (C) 2015-17, Freescale Semiconductor
 *
 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
 *
 * This file is dual-licensed: you can use it either under the terms
@@ -47,6 +48,7 @@
/dts-v1/;

#include "fsl-ls2080a.dtsi"
#include "fsl-ls208xa-qds.dtsi"

/ {
	model = "Freescale Layerscape 2080a QDS Board";
@@ -61,154 +63,3 @@ chosen {
		stdout-path = "serial0:115200n8";
	};
};

&esdhc {
	status = "okay";
};

&ifc {
	status = "okay";
	#address-cells = <2>;
	#size-cells = <1>;
	ranges = <0x0 0x0 0x5 0x80000000 0x08000000
		  0x2 0x0 0x5 0x30000000 0x00010000
		  0x3 0x0 0x5 0x20000000 0x00010000>;

	nor@0,0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "cfi-flash";
		reg = <0x0 0x0 0x8000000>;
		bank-width = <2>;
		device-width = <1>;
	};

	nand@2,0 {
	     compatible = "fsl,ifc-nand";
	     reg = <0x2 0x0 0x10000>;
	};

	cpld@3,0 {
	     reg = <0x3 0x0 0x10000>;
	     compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
	};
};

&i2c0 {
	status = "okay";
	pca9547@77 {
		compatible = "nxp,pca9547";
		reg = <0x77>;
		#address-cells = <1>;
		#size-cells = <0>;
		i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x00>;
			rtc@68 {
				compatible = "dallas,ds3232";
				reg = <0x68>;
			};
		};

		i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x02>;

			ina220@40 {
				compatible = "ti,ina220";
				reg = <0x40>;
				shunt-resistor = <500>;
			};

			ina220@41 {
				compatible = "ti,ina220";
				reg = <0x41>;
				shunt-resistor = <1000>;
			};
		};

		i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x3>;

			adt7481@4c {
				compatible = "adi,adt7461";
				reg = <0x4c>;
			};
		};
	};
};

&i2c1 {
	status = "disabled";
};

&i2c2 {
	status = "disabled";
};

&i2c3 {
	status = "disabled";
};

&dspi {
	status = "okay";
	dflash0: n25q128a {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p80";
		spi-max-frequency = <3000000>;
		reg = <0>;
	};
	dflash1: sst25wf040b {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p80";
		spi-max-frequency = <3000000>;
		reg = <1>;
	};
	dflash2: en25s64 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p80";
		spi-max-frequency = <3000000>;
		reg = <2>;
	};
};

&qspi {
	status = "okay";
	flash0: s25fl256s1@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p80";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
	flash2: s25fl256s1@2 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p80";
		spi-max-frequency = <20000000>;
		reg = <0>;
	};
};

&sata0 {
	status = "okay";
};

&sata1 {
	status = "okay";
};

&usb0 {
	status = "okay";
};

&usb1 {
	status = "okay";
};
+3 −107
Original line number Diff line number Diff line
/*
 * Device Tree file for Freescale LS2080a RDB Board.
 *
 * Copyright (C) 2015, Freescale Semiconductor
 * Copyright (C) 2016-17, Freescale Semiconductor
 *
 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
 * Bhupesh Sharma <bhupesh.sharma@freescale.com>
 *
 * This file is dual-licensed: you can use it either under the terms
@@ -47,6 +48,7 @@
/dts-v1/;

#include "fsl-ls2080a.dtsi"
#include "fsl-ls208xa-rdb.dtsi"

/ {
	model = "Freescale Layerscape 2080a RDB Board";
@@ -61,109 +63,3 @@ chosen {
		stdout-path = "serial1:115200n8";
	};
};

&esdhc {
	status = "okay";
};

&ifc {
	status = "okay";
	#address-cells = <2>;
	#size-cells = <1>;
	ranges = <0x0 0x0 0x5 0x80000000 0x08000000
		  0x2 0x0 0x5 0x30000000 0x00010000
		  0x3 0x0 0x5 0x20000000 0x00010000>;

	nor@0,0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "cfi-flash";
		reg = <0x0 0x0 0x8000000>;
		bank-width = <2>;
		device-width = <1>;
	};

	nand@2,0 {
	     compatible = "fsl,ifc-nand";
	     reg = <0x2 0x0 0x10000>;
	};

	cpld@3,0 {
	     reg = <0x3 0x0 0x10000>;
	     compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
	};

};

&i2c0 {
	status = "okay";
	pca9547@75 {
		compatible = "nxp,pca9547";
		reg = <0x75>;
		#address-cells = <1>;
		#size-cells = <0>;
		i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x01>;
			rtc@68 {
				compatible = "dallas,ds3232";
				reg = <0x68>;
			};
		};

		i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x3>;

			adt7481@4c {
				compatible = "adi,adt7461";
				reg = <0x4c>;
			};
		};
	};
};

&i2c1 {
	status = "disabled";
};

&i2c2 {
	status = "disabled";
};

&i2c3 {
	status = "disabled";
};

&dspi {
	status = "okay";
	dflash0: n25q512a {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "st,m25p80";
		spi-max-frequency = <3000000>;
		reg = <0>;
	};
};

&qspi {
	status = "disabled";
};

&sata0 {
	status = "okay";
};

&sata1 {
	status = "okay";
};

&usb0 {
	status = "okay";
};

&usb1 {
	status = "okay";
};
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