Commit c4246f4c authored by Subbaraya Sundeep's avatar Subbaraya Sundeep Committed by Jakub Kicinski
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octeontx2-pf: Avoid typecasts by simplifying otx2_atomic64_add macro 



Just because otx2_atomic64_add is using u64 pointer as argument
all callers has to typecast __iomem void pointers which inturn
causing sparse warnings. Fix those by changing otx2_atomic64_add
argument to void pointer.

Signed-off-by: default avatarSubbaraya Sundeep <sbhatta@marvell.com>
Link: https://patch.msgid.link/1749484421-3607-1-git-send-email-sbhatta@marvell.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent d0976b43

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c

+9 −8
Original line number Diff line number Diff line
@@ -28,12 +28,12 @@ static void otx2_nix_rq_op_stats(struct queue_stats *stats, 
				 struct otx2_nic *pfvf, int qidx)

{

	u64 incr = (u64)qidx << 32;

	u64 *ptr;

	void __iomem *ptr;



	ptr = (u64 *)otx2_get_regaddr(pfvf, NIX_LF_RQ_OP_OCTS);

	ptr = otx2_get_regaddr(pfvf, NIX_LF_RQ_OP_OCTS);

	stats->bytes = otx2_atomic64_add(incr, ptr);



	ptr = (u64 *)otx2_get_regaddr(pfvf, NIX_LF_RQ_OP_PKTS);

	ptr = otx2_get_regaddr(pfvf, NIX_LF_RQ_OP_PKTS);

	stats->pkts = otx2_atomic64_add(incr, ptr);

}
@@ -41,12 +41,12 @@ static void otx2_nix_sq_op_stats(struct queue_stats *stats, 
				 struct otx2_nic *pfvf, int qidx)

{

	u64 incr = (u64)qidx << 32;

	u64 *ptr;

	void __iomem *ptr;



	ptr = (u64 *)otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_OCTS);

	ptr = otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_OCTS);

	stats->bytes = otx2_atomic64_add(incr, ptr);



	ptr = (u64 *)otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_PKTS);

	ptr = otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_PKTS);

	stats->pkts = otx2_atomic64_add(incr, ptr);

}
@@ -860,9 +860,10 @@ void otx2_sqb_flush(struct otx2_nic *pfvf) 
{

	int qidx, sqe_tail, sqe_head;

	struct otx2_snd_queue *sq;

	u64 incr, *ptr, val;

	void __iomem *ptr;

	u64 incr, val;



	ptr = (u64 *)otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_STATUS);

	ptr = otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_STATUS);

	for (qidx = 0; qidx < otx2_get_total_tx_queues(pfvf); qidx++) {

		sq = &pfvf->qset.sq[qidx];

		if (!sq->sqb_ptrs)

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h

+8 −3
Original line number Diff line number Diff line
@@ -730,8 +730,9 @@ static inline void otx2_write128(u64 lo, u64 hi, void __iomem *addr) 
			 ::[x0]"r"(lo), [x1]"r"(hi), [p1]"r"(addr));

}



static inline u64 otx2_atomic64_add(u64 incr, u64 *ptr)

static inline u64 otx2_atomic64_add(u64 incr, void __iomem *addr)

{

	u64 __iomem *ptr = addr;

	u64 result;



	__asm__ volatile(".cpu   generic+lse\n"
@@ -744,7 +745,11 @@ static inline u64 otx2_atomic64_add(u64 incr, u64 *ptr) 


#else

#define otx2_write128(lo, hi, addr)		writeq((hi) | (lo), addr)

#define otx2_atomic64_add(incr, ptr)		({ *ptr += incr; })



static inline u64 otx2_atomic64_add(u64 incr, void __iomem *addr)

{

	return 0;

}

#endif



static inline void __cn10k_aura_freeptr(struct otx2_nic *pfvf, u64 aura,
@@ -794,7 +799,7 @@ static inline void cn10k_aura_freeptr(void *dev, int aura, u64 buf) 
/* Alloc pointer from pool/aura */

static inline u64 otx2_aura_allocptr(struct otx2_nic *pfvf, int aura)

{

	u64 *ptr = (__force u64 *)otx2_get_regaddr(pfvf, NPA_LF_AURA_OP_ALLOCX(0));

	void __iomem *ptr = otx2_get_regaddr(pfvf, NPA_LF_AURA_OP_ALLOCX(0));

	u64 incr = (u64)aura | BIT_ULL(63);



	return otx2_atomic64_add(incr, ptr);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

+2 −2
Original line number Diff line number Diff line
@@ -1322,8 +1322,8 @@ static irqreturn_t otx2_q_intr_handler(int irq, void *data) 
{

	struct otx2_nic *pf = data;

	struct otx2_snd_queue *sq;

	u64 val, *ptr;

	u64 qidx = 0;

	void __iomem *ptr;

	u64 val, qidx = 0;



	/* CQ */

	for (qidx = 0; qidx < pf->qset.cq_cnt; qidx++) {

drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c

+3 −2
Original line number Diff line number Diff line
@@ -151,9 +151,10 @@ static void otx2_qos_sq_free_sqbs(struct otx2_nic *pfvf, int qidx) 
static void otx2_qos_sqb_flush(struct otx2_nic *pfvf, int qidx)

{

	int sqe_tail, sqe_head;

	u64 incr, *ptr, val;

	void __iomem *ptr;

	u64 incr, val;



	ptr = (__force u64 *)otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_STATUS);

	ptr = otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_STATUS);

	incr = (u64)qidx << 32;

	val = otx2_atomic64_add(incr, ptr);

	sqe_head = (val >> 20) & 0x3F;