Commit c437190c authored by Jiasheng Jiang's avatar Jiasheng Jiang Committed by Jonathan Cameron
Browse files

iio: trigger: stm32-timer-trigger: Add check for clk_enable() 



Add check for the return value of clk_enable() in order to catch the
potential exception.

Reviewed-by: default avatarDavid Lechner <dlechner@baylibre.com>
Signed-off-by: default avatarJiasheng Jiang <jiashengjiangcool@gmail.com>
Link: https://patch.msgid.link/20241123220149.30655-1-jiashengjiangcool@gmail.com


Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent e895f2ed

drivers/iio/trigger/stm32-timer-trigger.c

+29 −19
Original line number Diff line number Diff line
@@ -119,7 +119,7 @@ static int stm32_timer_start(struct stm32_timer_trigger *priv, 
			     unsigned int frequency)

{

	unsigned long long prd, div;

	int prescaler = 0;

	int prescaler = 0, ret;

	u32 ccer;



	/* Period and prescaler values depends of clock rate */
@@ -150,10 +150,12 @@ static int stm32_timer_start(struct stm32_timer_trigger *priv, 
	if (ccer & TIM_CCER_CCXE)

		return -EBUSY;



	mutex_lock(&priv->lock);

	guard(mutex)(&priv->lock);

	if (!priv->enabled) {

		priv->enabled = true;

		clk_enable(priv->clk);

		ret = clk_enable(priv->clk);

		if (ret)

			return ret;

	}



	regmap_write(priv->regmap, TIM_PSC, prescaler);
@@ -173,7 +175,6 @@ static int stm32_timer_start(struct stm32_timer_trigger *priv, 


	/* Enable controller */

	regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);

	mutex_unlock(&priv->lock);



	return 0;

}
@@ -307,7 +308,7 @@ static ssize_t stm32_tt_store_master_mode(struct device *dev, 
	struct stm32_timer_trigger *priv = dev_get_drvdata(dev);

	struct iio_trigger *trig = to_iio_trigger(dev);

	u32 mask, shift, master_mode_max;

	int i;

	int i, ret;



	if (stm32_timer_is_trgo2_name(trig->name)) {

		mask = TIM_CR2_MMS2;
@@ -322,15 +323,16 @@ static ssize_t stm32_tt_store_master_mode(struct device *dev, 
	for (i = 0; i <= master_mode_max; i++) {

		if (!strncmp(master_mode_table[i], buf,

			     strlen(master_mode_table[i]))) {

			mutex_lock(&priv->lock);

			guard(mutex)(&priv->lock);

			if (!priv->enabled) {

				/* Clock should be enabled first */

				priv->enabled = true;

				clk_enable(priv->clk);

				ret = clk_enable(priv->clk);

				if (ret)

					return ret;

			}

			regmap_update_bits(priv->regmap, TIM_CR2, mask,

					   i << shift);

			mutex_unlock(&priv->lock);

			return len;

		}

	}
@@ -482,6 +484,7 @@ static int stm32_counter_write_raw(struct iio_dev *indio_dev, 
				   int val, int val2, long mask)

{

	struct stm32_timer_trigger *priv = iio_priv(indio_dev);

	int ret;



	switch (mask) {

	case IIO_CHAN_INFO_RAW:
@@ -491,12 +494,14 @@ static int stm32_counter_write_raw(struct iio_dev *indio_dev, 
		/* fixed scale */

		return -EINVAL;



	case IIO_CHAN_INFO_ENABLE:

		mutex_lock(&priv->lock);

	case IIO_CHAN_INFO_ENABLE: {

		guard(mutex)(&priv->lock);

		if (val) {

			if (!priv->enabled) {

				priv->enabled = true;

				clk_enable(priv->clk);

				ret = clk_enable(priv->clk);

				if (ret)

					return ret;

			}

			regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN);

		} else {
@@ -506,12 +511,13 @@ static int stm32_counter_write_raw(struct iio_dev *indio_dev, 
				clk_disable(priv->clk);

			}

		}

		mutex_unlock(&priv->lock);



		return 0;

	}



	default:

		return -EINVAL;

	}

}



static int stm32_counter_validate_trigger(struct iio_dev *indio_dev,

					  struct iio_trigger *trig)
@@ -602,6 +608,7 @@ static int stm32_set_enable_mode(struct iio_dev *indio_dev, 
{

	struct stm32_timer_trigger *priv = iio_priv(indio_dev);

	int sms = stm32_enable_mode2sms(mode);

	int ret;



	if (sms < 0)

		return sms;
@@ -609,12 +616,15 @@ static int stm32_set_enable_mode(struct iio_dev *indio_dev, 
	 * Triggered mode sets CEN bit automatically by hardware. So, first

	 * enable counter clock, so it can use it. Keeps it in sync with CEN.

	 */

	mutex_lock(&priv->lock);

	scoped_guard(mutex, &priv->lock) {

		if (sms == 6 && !priv->enabled) {

		clk_enable(priv->clk);

			ret = clk_enable(priv->clk);

			if (ret)

				return ret;



			priv->enabled = true;

		}

	mutex_unlock(&priv->lock);

	}



	regmap_update_bits(priv->regmap, TIM_SMCR, TIM_SMCR_SMS, sms);