Commit c510368b authored by Tommaso Merciai's avatar Tommaso Merciai Committed by Geert Uytterhoeven
Browse files

dt-bindings: clock: renesas,r9a09g047-cpg: Add USB2 PHY core clocks 



Add definitions for USB2 PHY core clocks in the R9A09G047 CPG DT
bindings header file.

Signed-off-by: default avatarTommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251001212709.579080-9-tommaso.merciai.xr@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 3a866087

include/dt-bindings/clock/renesas,r9a09g047-cpg.h

+2 −0
Original line number Diff line number Diff line
@@ -22,5 +22,7 @@ 
#define R9A09G047_GBETH_1_CLK_PTP_REF_I		11

#define R9A09G047_USB3_0_REF_ALT_CLK_P		12

#define R9A09G047_USB3_0_CLKCORE		13

#define R9A09G047_USB2_0_CLK_CORE0		14

#define R9A09G047_USB2_0_CLK_CORE1		15



#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G047_CPG_H__ */