Commit c528aaa3 authored by Ankit Nautiyal's avatar Ankit Nautiyal Committed by Radhakrishna Sripada
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Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping" 



This reverts commit 562f3383.
For BMG it seems that the VBT to DDI mapping does not follow DG1, and
DG2, but follows ADLP mapping given in Bspec:20124.

Signed-off-by: default avatarAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: default avatarBalasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240430172850.1881525-15-radhakrishna.sripada@intel.com
parent a8c026d0

drivers/gpu/drm/i915/display/intel_bios.c

+2 −3
Original line number Diff line number Diff line
@@ -2231,15 +2231,14 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin) 
	const u8 *ddc_pin_map;

	int i, n_entries;



	if (IS_DGFX(i915))

		return vbt_pin;



	if (INTEL_PCH_TYPE(i915) >= PCH_MTL || IS_ALDERLAKE_P(i915)) {

		ddc_pin_map = adlp_ddc_pin_map;

		n_entries = ARRAY_SIZE(adlp_ddc_pin_map);

	} else if (IS_ALDERLAKE_S(i915)) {

		ddc_pin_map = adls_ddc_pin_map;

		n_entries = ARRAY_SIZE(adls_ddc_pin_map);

	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {

		return vbt_pin;

	} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {

		ddc_pin_map = rkl_pch_tgp_ddc_pin_map;

		n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);