Commit c5996e4a authored by Andy Yan's avatar Andy Yan Committed by Heiko Stuebner
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drm/rockchip: vop2: Make overlay layer select register configuration take effect by vsync 



Because the layer/window enable/disable is take effect by vsync, if the
overlay configuration of these layers does not follow vsync and
takes effect immediately instead, when multiple layers are dynamically
enable/disable, inconsistent display contents may be seen on the screen.

Signed-off-by: default avatarAndy Yan <andy.yan@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250318062024.4555-1-andyshrk@163.com
parent bcdc354a

drivers/gpu/drm/rockchip/rockchip_drm_vop2.h

+1 −0
Original line number Diff line number Diff line
@@ -710,6 +710,7 @@ enum dst_factor_mode { 


#define VOP2_COLOR_KEY_MASK				BIT(31)



#define RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL		GENMASK(31, 30)

#define RK3568_OVL_CTRL__LAYERSEL_REGDONE_IMD		BIT(28)

#define RK3568_OVL_CTRL__YUV_MODE(vp)			BIT(vp)

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

+4 −1
Original line number Diff line number Diff line
@@ -2070,7 +2070,10 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp) 
	struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(vp->crtc.state);



	ovl_ctrl = vop2_readl(vop2, RK3568_OVL_CTRL);

	ovl_ctrl |= RK3568_OVL_CTRL__LAYERSEL_REGDONE_IMD;

	ovl_ctrl &= ~RK3568_OVL_CTRL__LAYERSEL_REGDONE_IMD;

	ovl_ctrl &= ~RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL;

	ovl_ctrl |= FIELD_PREP(RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL, vp->id);



	if (vcstate->yuv_overlay)

		ovl_ctrl |= RK3568_OVL_CTRL__YUV_MODE(vp->id);

	else