Commit c59ade93 authored by Alex Hung's avatar Alex Hung Committed by Alex Deucher
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drm/amd/display: Initialize a default to phyd32clk 



[WHAT]
phyd32clk may not be assigned before used. Give it a value based
on the default from get_phyd32clk_src().

This is reported as an UNINIT error by Coverity.

Reviewed-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: default avatarAlex Hung <alex.hung@amd.com>
Signed-off-by: default avatarMatthew Stewart <matthew.stewart2@amd.com>
Tested-by: default avatarDan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 803a4cb8

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

+1 −1
Original line number Diff line number Diff line
@@ -948,7 +948,7 @@ void dcn401_enable_stream(struct pipe_ctx *pipe_ctx) 
	const struct link_hwss *link_hwss = get_link_hwss(link, &pipe_ctx->link_res);

	struct dc *dc = pipe_ctx->stream->ctx->dc;

	struct dccg *dccg = dc->res_pool->dccg;

	enum phyd32clk_clock_source phyd32clk;

	enum phyd32clk_clock_source phyd32clk = PHYD32CLKA;

	int dp_hpo_inst = 0;

	unsigned int tmds_div = PIXEL_RATE_DIV_NA;

	unsigned int unused_div = PIXEL_RATE_DIV_NA;