Commit c5a8b5d7 authored Jan 02, 2025 by Yunxiang Li Committed by Alex Williamson Jan 06, 2025

vfio/pci: Remove shadow ROM specific code paths



After commit 0c0e0736 ("PCI: Set ROM shadow location in arch code,
not in PCI core"), the shadow ROM works the same as regular ROM BARs so
these code paths are no longer needed.

Signed-off-by: Yunxiang Li <Yunxiang.Li@amd.com>
Link: https://lore.kernel.org/r/20250102185013.15082-2-Yunxiang.Li@amd.com


Signed-off-by: Alex Williamson <alex.williamson@redhat.com>

parent b44a06bd

drivers/vfio/pci/vfio_pci_config.c

+2 −6

Original line number	Diff line number	Diff line
		@@ -511,13 +511,9 @@ static void vfio_bar_fixup(struct vfio_pci_core_device *vdev)
		mask = ~(pci_resource_len(pdev, PCI_ROM_RESOURCE) - 1);
		mask \|= PCI_ROM_ADDRESS_ENABLE;
		*vbar &= cpu_to_le32((u32)mask);
		} else if (pdev->resource[PCI_ROM_RESOURCE].flags &
		IORESOURCE_ROM_SHADOW) {
		mask = ~(0x20000 - 1);
		mask \|= PCI_ROM_ADDRESS_ENABLE;
		*vbar &= cpu_to_le32((u32)mask);
		} else
		} else {
		*vbar = 0;
		}

		vdev->bardirty = false;
		}

drivers/vfio/pci/vfio_pci_core.c

+2 −8

Original line number	Diff line number	Diff line
		@@ -1057,14 +1057,8 @@ static int vfio_pci_ioctl_get_region_info(struct vfio_pci_core_device *vdev,

		/* Report the BAR size, not the ROM size */
		info.size = pci_resource_len(pdev, info.index);
		if (!info.size) {
		/* Shadow ROMs appear as PCI option ROMs */
		if (pdev->resource[PCI_ROM_RESOURCE].flags &
		IORESOURCE_ROM_SHADOW)
		info.size = 0x20000;
		else
		if (!info.size)
		break;
		}

		/*
		* Is it really there? Enable memory decode for implicit access

drivers/vfio/pci/vfio_pci_rdwr.c

+0 −3

Original line number	Diff line number	Diff line
		@@ -237,9 +237,6 @@ ssize_t vfio_pci_bar_rw(struct vfio_pci_core_device vdev, char __user buf,

		if (pci_resource_start(pdev, bar))
		end = pci_resource_len(pdev, bar);
		else if (bar == PCI_ROM_RESOURCE &&
		pdev->resource[bar].flags & IORESOURCE_ROM_SHADOW)
		end = 0x20000;
		else
		return -EINVAL;