Commit c6e63a98 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pwm/for-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux 

Pull pwm updates from Uwe Kleine-König:
 "This contains the usual mix of fixes, cleanups, two new drivers and
  several dt binding updates. The fixes are for minor issues that are
  already old (4.11-rc1 and 3.9-rc1) and were found by code review and
  not during usage, so I didn't sent them for earlier inclusion.

  The changes to include/linux/mfd/stm32-timers.h and
  drivers/counter/stm32-timer-cnt.c are part of an immutable branch that
  will also be included in the mfd and counter pulls. It changes some
  register definitions and affects the pwm-stm32 driver.

  Thanks go to Andy Shevchenko, AngeloGioacchino Del Regno, Conor
  Dooley, David Lechner, Dhruva Gole, Drew Fustini, Frank Li, Jeff
  Johnson, Junyi Zhao, Kelvin Zhang, Krzysztof Kozlowski, Lee Jones,
  Linus Walleij, Linus Walleij, Michael Hennerich, Nicola Di Lieto,
  Nicolas Ferre, Nuno Sa, Paul Cercueil, Raag Jadav, Rob Herring, Sean
  Anderson, Sean Young, Shenwei Wang, Stefan Wahren, Trevor Gamblin,
  Tzung-Bi Shih, Vincent Whitchurch and William Breathitt Gray for their
  contributions to this pull request; they authored changes, spend time
  reviewing changes and coordinated the above mentioned immutable
  branch"

* tag 'pwm/for-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux: (38 commits)
  pwm: axi-pwmgen: add .max_register to regmap
  dt-bindings: pwm: at91: Add sama7d65 compatible string
  pwm: atmel-tcb: Make private data variable naming consistent
  pwm: atmel-tcb: Simplify checking the companion output
  pwm: Allow pwm state transitions from an invalid state
  pwm: xilinx: Simplify using devm_ functions
  pwm: Use guards for pwm_lookup_lock instead of explicity mutex_lock + mutex_unlock
  pwm: Use guards for export->lock instead of explicity mutex_lock + mutex_unlock
  pwm: Use guards for pwm_lock instead of explicity mutex_lock + mutex_unlock
  pwm: Register debugfs operations after the pwm class
  pwm: imx-tpm: Enable pinctrl setting for sleep state
  pwm: lpss: drop redundant runtime PM handles
  pwm: lpss: use devm_pm_runtime_enable() helper
  pwm-stm32: Make use of parametrised register definitions
  dt-bindings: pwm: imx: remove interrupt property from required
  pwm: meson: Add support for Amlogic S4 PWM
  pwm: Add GPIO PWM driver
  dt-bindings: pwm: Add pwm-gpio
  pwm: Drop pwm_apply_state()
  bus: ts-nbus: Use pwm_apply_might_sleep()
  ...
parents 500a711d 240b129d

Documentation/devicetree/bindings/pwm/adi,axi-pwmgen.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/pwm/adi,axi-pwmgen.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Analog Devices AXI PWM generator



maintainers:

  - Michael Hennerich <Michael.Hennerich@analog.com>

  - Nuno Sá <nuno.sa@analog.com>



description:

  The Analog Devices AXI PWM generator can generate PWM signals

  with variable pulse width and period.



  https://wiki.analog.com/resources/fpga/docs/axi_pwm_gen



allOf:

  - $ref: pwm.yaml#



properties:

  compatible:

    const: adi,axi-pwmgen-2.00.a



  reg:

    maxItems: 1



  "#pwm-cells":

    const: 2



  clocks:

    maxItems: 1



required:

  - reg

  - clocks



unevaluatedProperties: false



examples:

  - |

    pwm@44b00000 {

       compatible = "adi,axi-pwmgen-2.00.a";

       reg = <0x44b00000 0x1000>;

       clocks = <&spi_clk>;

       #pwm-cells = <2>;

    };

Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml

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@@ -23,7 +23,9 @@ properties: 
              - atmel,sama5d2-pwm

              - microchip,sam9x60-pwm

      - items:

          - const: microchip,sama7g5-pwm

          - enum:

              - microchip,sama7d65-pwm

              - microchip,sama7g5-pwm

          - const: atmel,sama5d2-pwm

      - items:

          - const: microchip,sam9x7-pwm

Documentation/devicetree/bindings/pwm/fsl,vf610-ftm-pwm.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/pwm/fsl,vf610-ftm-pwm.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Freescale FlexTimer Module (FTM) PWM controller



description: |

  The same FTM PWM device can have a different endianness on different SoCs. The

  device tree provides a property to describing this so that an operating system

  device driver can handle all variants of the device. Refer to the table below

  for the endianness of the FTM PWM block as integrated into the existing SoCs:



  SoC     | FTM-PWM endianness

  --------+-------------------

  Vybrid  | LE

  LS1     | BE

  LS2     | LE



  Please see ../regmap/regmap.txt for more detail about how to specify endian

  modes in device tree.



maintainers:

  - Frank Li <Frank.Li@nxp.com>



properties:

  compatible:

    enum:

      - fsl,vf610-ftm-pwm

      - fsl,imx8qm-ftm-pwm



  reg:

    maxItems: 1



  "#pwm-cells":

    const: 3



  clocks:

    minItems: 4

    maxItems: 4



  clock-names:

    items:

      - const: ftm_sys

      - const: ftm_ext

      - const: ftm_fix

      - const: ftm_cnt_clk_en



  pinctrl-0: true

  pinctrl-1: true



  pinctrl-names:

    minItems: 1

    items:

      - const: default

      - const: sleep



  big-endian:

    $ref: /schemas/types.yaml#/definitions/flag

    description:

      Boolean property, required if the FTM PWM registers use a big-

      endian rather than little-endian layout.



required:

  - compatible

  - reg

  - clocks

  - clock-names



allOf:

  - $ref: pwm.yaml#



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/vf610-clock.h>



    pwm@40038000 {

        compatible = "fsl,vf610-ftm-pwm";

        reg = <0x40038000 0x1000>;

        #pwm-cells = <3>;

        clocks = <&clks VF610_CLK_FTM0>,

                 <&clks VF610_CLK_FTM0_EXT_SEL>,

                 <&clks VF610_CLK_FTM0_FIX_SEL>,

                 <&clks VF610_CLK_FTM0_EXT_FIX_EN>;

        clock-names = "ftm_sys", "ftm_ext", "ftm_fix", "ftm_cnt_clk_en";

        pinctrl-names = "default";

        pinctrl-0 = <&pinctrl_pwm0_1>;

        big-endian;

    };

Documentation/devicetree/bindings/pwm/imx-pwm.yaml

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@@ -68,7 +68,6 @@ required: 
  - reg

  - clocks

  - clock-names

  - interrupts



additionalProperties: false

Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt

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Freescale FlexTimer Module (FTM) PWM controller



The same FTM PWM device can have a different endianness on different SoCs. The

device tree provides a property to describing this so that an operating system

device driver can handle all variants of the device. Refer to the table below

for the endianness of the FTM PWM block as integrated into the existing SoCs:



	SoC     | FTM-PWM endianness

	--------+-------------------

	Vybrid  | LE

	LS1     | BE

	LS2     | LE



Please see ../regmap/regmap.txt for more detail about how to specify endian

modes in device tree.





Required properties:

- compatible : should be "fsl,<soc>-ftm-pwm" and one of the following

   compatible strings:

  - "fsl,vf610-ftm-pwm" for PWM compatible with the one integrated on VF610

  - "fsl,imx8qm-ftm-pwm" for PWM compatible with the one integrated on i.MX8QM

- reg: Physical base address and length of the controller's registers

- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of

  the cells format.

- clock-names: Should include the following module clock source entries:

    "ftm_sys" (module clock, also can be used as counter clock),

    "ftm_ext" (external counter clock),

    "ftm_fix" (fixed counter clock),

    "ftm_cnt_clk_en" (external and fixed counter clock enable/disable).

- clocks: Must contain a phandle and clock specifier for each entry in

  clock-names, please see clock/clock-bindings.txt for details of the property

  values.

- pinctrl-names: Must contain a "default" entry.

- pinctrl-NNN: One property must exist for each entry in pinctrl-names.

  See pinctrl/pinctrl-bindings.txt for details of the property values.

- big-endian: Boolean property, required if the FTM PWM registers use a big-

  endian rather than little-endian layout.



Example:



pwm0: pwm@40038000 {

		compatible = "fsl,vf610-ftm-pwm";

		reg = <0x40038000 0x1000>;

		#pwm-cells = <3>;

		clock-names = "ftm_sys", "ftm_ext",

				"ftm_fix", "ftm_cnt_clk_en";

		clocks = <&clks VF610_CLK_FTM0>,

			<&clks VF610_CLK_FTM0_EXT_SEL>,

			<&clks VF610_CLK_FTM0_FIX_SEL>,

			<&clks VF610_CLK_FTM0_EXT_FIX_EN>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_pwm0_1>;

		big-endian;

};