Commit c7125739 authored by Beata Michalska's avatar Beata Michalska Committed by Danilo Krummrich
Browse files

rust: dma: allow drivers to tune max segment size



Make dma_set_max_seg_size() available to Rust so drivers can perform
standard DMA setup steps.

Signed-off-by: default avatarBeata Michalska <beata.michalska@arm.com>
Acked-by: default avatarRobin Murphy <robvin.murphy@arm.com>
Reviewed-by: default avatarAlice Ryhl <aliceryhl@google.com>
Link: https://patch.msgid.link/20260128135320.689046-1-beata.michalska@arm.com


Signed-off-by: default avatarDanilo Krummrich <dakr@kernel.org>
parent 7c60d964
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+6 −0
Original line number Diff line number Diff line
@@ -43,3 +43,9 @@ size_t rust_helper_dma_max_mapping_size(struct device *dev)
{
	return dma_max_mapping_size(dev);
}

__rust_helper void rust_helper_dma_set_max_seg_size(struct device *dev,
						    unsigned int size)
{
	dma_set_max_seg_size(dev, size);
}
+17 −0
Original line number Diff line number Diff line
@@ -85,6 +85,23 @@ unsafe fn dma_set_mask_and_coherent(&self, mask: DmaMask) -> Result {
            bindings::dma_set_mask_and_coherent(self.as_ref().as_raw(), mask.value())
        })
    }

    /// Set the maximum size of a single DMA segment the device may request.
    ///
    /// This method is usually called once from `probe()` as soon as the device capabilities are
    /// known.
    ///
    /// # Safety
    ///
    /// This method must not be called concurrently with any DMA allocation or mapping primitives,
    /// such as [`CoherentAllocation::alloc_attrs`].
    unsafe fn dma_set_max_seg_size(&self, size: u32) {
        // SAFETY:
        // - By the type invariant of `device::Device`, `self.as_ref().as_raw()` is valid.
        // - The safety requirement of this function guarantees that there are no concurrent calls
        //   to DMA allocation and mapping primitives using this parameter.
        unsafe { bindings::dma_set_max_seg_size(self.as_ref().as_raw(), size) }
    }
}

/// A DMA mask that holds a bitmask with the lowest `n` bits set.