Commit c72ede1c authored Apr 02, 2025 by Wolfram Sang Committed by Claudiu Beznea Apr 11, 2025

ARM: dts: at91: at91sam9263: fix NAND chip selects

NAND did not work on my USB-A9263. I discovered that the offending
commit converted the PIO bank for chip selects wrongly, so all A9263
boards need to be fixed.

Fixes: 1004a297 ("ARM: dts: at91: Switch to the new NAND bindings")
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20250402210446.5972-2-wsa+renesas@sang-engineering.com

Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

parent dc658570

arch/arm/boot/dts/microchip/at91sam9263ek.dts

+1 −1

Original line number	Diff line number	Diff line
		@@ -152,7 +152,7 @@ nand_controller: nand-controller {
		nand@3 {
		reg = <0x3 0x0 0x800000>;
		rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>;
		cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
		cs-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
		nand-bus-width = <8>;
		nand-ecc-mode = "soft";
		nand-on-flash-bbt;

arch/arm/boot/dts/microchip/tny_a9263.dts

+1 −1

Original line number	Diff line number	Diff line
		@@ -64,7 +64,7 @@ nand_controller: nand-controller {
		nand@3 {
		reg = <0x3 0x0 0x800000>;
		rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>;
		cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
		cs-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
		nand-bus-width = <8>;
		nand-ecc-mode = "soft";
		nand-on-flash-bbt;

arch/arm/boot/dts/microchip/usb_a9263.dts

+1 −1

Original line number	Diff line number	Diff line
		@@ -84,7 +84,7 @@ nand_controller: nand-controller {
		nand@3 {
		reg = <0x3 0x0 0x800000>;
		rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>;
		cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
		cs-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
		nand-bus-width = <8>;
		nand-ecc-mode = "soft";
		nand-on-flash-bbt;