Commit c7753f18 authored by Matthew Wilcox's avatar Matthew Wilcox
Browse files

[PARISC] More pt_regs removal 



Remove pt_regs from ipi_interrupt and timer_interrupt.
Inline smp_do_timer() into its only caller, and unify the SMP and
non-SMP paths.  Fixes a profiling bug.

Signed-off-by: default avatarMatthew Wilcox <matthew@wil.cx>
parent bbd6330e

arch/parisc/kernel/smp.c

+1 −14
Original line number Diff line number Diff line
@@ -154,7 +154,7 @@ halt_processor(void) 




irqreturn_t

ipi_interrupt(int irq, void *dev_id, struct pt_regs *regs) 

ipi_interrupt(int irq, void *dev_id) 

{

	int this_cpu = smp_processor_id();

	struct cpuinfo_parisc *p = &cpu_data[this_cpu];
@@ -414,19 +414,6 @@ smp_flush_tlb_all(void) 
	on_each_cpu(flush_tlb_all_local, NULL, 1, 1);

}





void 

smp_do_timer(struct pt_regs *regs)

{

	int cpu = smp_processor_id();

	struct cpuinfo_parisc *data = &cpu_data[cpu];



        if (!--data->prof_counter) {

		data->prof_counter = data->prof_multiplier;

		update_process_times(user_mode(regs));

	}

}



/*

 * Called by secondaries to update state and initialize CPU registers.

 */

arch/parisc/kernel/time.c

+11 −13
Original line number Diff line number Diff line
@@ -34,10 +34,6 @@ 


static unsigned long clocktick __read_mostly;	/* timer cycles per tick */



#ifdef CONFIG_SMP

extern void smp_do_timer(struct pt_regs *regs);

#endif



/*

 * We keep time on PA-RISC Linux by using the Interval Timer which is

 * a pair of registers; one is read-only and one is write-only; both
@@ -55,13 +51,14 @@ extern void smp_do_timer(struct pt_regs *regs); 
 * held off for an arbitrarily long period of time by interrupts being

 * disabled, so we may miss one or more ticks.

 */

irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)

irqreturn_t timer_interrupt(int irq, void *dev_id)

{

	unsigned long now;

	unsigned long next_tick;

	unsigned long cycles_elapsed, ticks_elapsed;

	unsigned long cycles_remainder;

	unsigned int cpu = smp_processor_id();

	struct cpuinfo_parisc *cpuinfo = &cpu_data[cpu];



	/* gcc can optimize for "read-only" case with a local clocktick */

	unsigned long cpt = clocktick;
@@ -69,7 +66,7 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 
	profile_tick(CPU_PROFILING);



	/* Initialize next_tick to the expected tick time. */

	next_tick = cpu_data[cpu].it_value;

	next_tick = cpuinfo->it_value;



	/* Get current interval timer.

	 * CR16 reads as 64 bits in CPU wide mode.
@@ -120,7 +117,7 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 
	 */

	next_tick = now + cycles_remainder;



	cpu_data[cpu].it_value = next_tick;

	cpuinfo->it_value = next_tick;



	/* Skip one clocktick on purpose if we are likely to miss next_tick.

	 * We want to avoid the new next_tick being less than CR16.
@@ -138,11 +135,12 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 
	/* Done mucking with unreliable delivery of interrupts.

	 * Go do system house keeping.

	 */

#ifdef CONFIG_SMP

	smp_do_timer(regs);

#else

	update_process_times(user_mode(regs));

#endif



	if (!--cpuinfo->prof_counter) {

		cpuinfo->prof_counter = cpuinfo->prof_multiplier;

		update_process_times(user_mode(get_irq_regs()));

	}



	if (cpu == 0) {

		write_seqlock(&xtime_lock);

		do_timer(ticks_elapsed);