Commit c7b4ecc1 authored by Aurabindo Pillai's avatar Aurabindo Pillai Committed by Alex Deucher
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drm/amd/display: Add a missing DCN401 reg definition 



Add a mising reg field to the autogenerated header for future use

Signed-off-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: default avatarDillon Varone <dillon.varone@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8b7f3529

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_1_0_sh_mask.h

+2 −0
Original line number Diff line number Diff line
@@ -6199,10 +6199,12 @@ 
#define DCHUBBUB_CTRL_STATUS__ROB_UNDERFLOW_STATUS__SHIFT                                                     0x1

#define DCHUBBUB_CTRL_STATUS__ROB_OVERFLOW_STATUS__SHIFT                                                      0x2

#define DCHUBBUB_CTRL_STATUS__ROB_OVERFLOW_CLEAR__SHIFT                                                       0x3

#define DCHUBBUB_CTRL_STATUS__DCHUBBUB_HW_DEBUG__SHIFT                                                        0x4

#define DCHUBBUB_CTRL_STATUS__CSTATE_SWATH_CHK_GOOD_MODE__SHIFT                                               0x1f

#define DCHUBBUB_CTRL_STATUS__ROB_UNDERFLOW_STATUS_MASK                                                       0x00000002L

#define DCHUBBUB_CTRL_STATUS__ROB_OVERFLOW_STATUS_MASK                                                        0x00000004L

#define DCHUBBUB_CTRL_STATUS__ROB_OVERFLOW_CLEAR_MASK                                                         0x00000008L

#define DCHUBBUB_CTRL_STATUS__DCHUBBUB_HW_DEBUG_MASK                                                          0x3FFFFFF0L

#define DCHUBBUB_CTRL_STATUS__CSTATE_SWATH_CHK_GOOD_MODE_MASK                                                 0x80000000L

//DCHUBBUB_TIMEOUT_DETECTION_CTRL1

#define DCHUBBUB_TIMEOUT_DETECTION_CTRL1__DCHUBBUB_TIMEOUT_ERROR_STATUS__SHIFT                                0x0