Commit c89d780c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull arm64 updates from Catalin Marinas:
 "The biggest part is the virtual CPU hotplug that touches ACPI,
  irqchip. We also have some GICv3 optimisation for pseudo-NMIs that has
  been queued via the arm64 tree. Otherwise the usual perf updates,
  kselftest, various small cleanups.

  Core:

   - Virtual CPU hotplug support for arm64 ACPI systems

   - cpufeature infrastructure cleanups and making the FEAT_ECBHB ID
     bits visible to guests

   - CPU errata: expand the speculative SSBS workaround to more CPUs

   - GICv3, use compile-time PMR values: optimise the way regular IRQs
     are masked/unmasked when GICv3 pseudo-NMIs are used, removing the
     need for a static key in fast paths by using a priority value
     chosen dynamically at boot time

  ACPI:

   - 'acpi=nospcr' option to disable SPCR as default console for arm64

   - Move some ACPI code (cpuidle, FFH) to drivers/acpi/arm64/

  Perf updates:

   - Rework of the IMX PMU driver to enable support for I.MX95

   - Enable support for tertiary match groups in the CMN PMU driver

   - Initial refactoring of the CPU PMU code to prepare for the fixed
     instruction counter introduced by Arm v9.4

   - Add missing PMU driver MODULE_DESCRIPTION() strings

   - Hook up DT compatibles for recent CPU PMUs

  Kselftest updates:

   - Kernel mode NEON fp-stress

   - Cleanups, spelling mistakes

  Miscellaneous:

   - arm64 Documentation update with a minor clarification on TBI

   - Fix missing IPI statistics

   - Implement raw_smp_processor_id() using thread_info rather than a
     per-CPU variable (better code generation)

   - Make MTE checking of in-kernel asynchronous tag faults conditional
     on KASAN being enabled

   - Minor cleanups, typos"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (69 commits)
  selftests: arm64: tags: remove the result script
  selftests: arm64: tags_test: conform test to TAP output
  perf: add missing MODULE_DESCRIPTION() macros
  arm64: smp: Fix missing IPI statistics
  irqchip/gic-v3: Fix 'broken_rdists' unused warning when !SMP and !ACPI
  ACPI: Add acpi=nospcr to disable ACPI SPCR as default console on ARM64
  Documentation: arm64: Update memory.rst for TBI
  arm64/cpufeature: Replace custom macros with fields from ID_AA64PFR0_EL1
  KVM: arm64: Replace custom macros with fields from ID_AA64PFR0_EL1
  perf: arm_pmuv3: Include asm/arm_pmuv3.h from linux/perf/arm_pmuv3.h
  perf: arm_v6/7_pmu: Drop non-DT probe support
  perf/arm: Move 32-bit PMU drivers to drivers/perf/
  perf: arm_pmuv3: Drop unnecessary IS_ENABLED(CONFIG_ARM64) check
  perf: arm_pmuv3: Avoid assigning fixed cycle counter with threshold
  arm64: Kconfig: Fix dependencies to enable ACPI_HOTPLUG_CPU
  perf: imx_perf: add support for i.MX95 platform
  perf: imx_perf: fix counter start and config sequence
  perf: imx_perf: refactor driver for imx93
  perf: imx_perf: let the driver manage the counter usage rather the user
  perf: imx_perf: add macro definitions for parsing config attr
  ...
parents bbb3556c 4f3a6c4d

Documentation/ABI/testing/sysfs-devices-system-cpu

+6 −0
Original line number Diff line number Diff line
@@ -694,3 +694,9 @@ Description: 
		(RO) indicates whether or not the kernel directly supports

		modifying the crash elfcorehdr for CPU hot un/plug and/or

		on/offline changes.



What:		/sys/devices/system/cpu/enabled

Date:		Nov 2022

Contact:	Linux kernel mailing list <linux-kernel@vger.kernel.org>

Description:

		(RO) the list of CPUs that can be brought online.

Documentation/admin-guide/kernel-parameters.txt

+7 −3
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ 
	acpi=		[HW,ACPI,X86,ARM64,RISCV64,EARLY]

			Advanced Configuration and Power Interface

			Format: { force | on | off | strict | noirq | rsdt |

				  copy_dsdt }

				  copy_dsdt | nospcr }

			force -- enable ACPI if default was off

			on -- enable ACPI but allow fallback to DT [arm64,riscv64]

			off -- disable ACPI if default was on
@@ -21,8 +21,12 @@ 
				strictly ACPI specification compliant.

			rsdt -- prefer RSDT over (default) XSDT

			copy_dsdt -- copy DSDT to memory

			For ARM64 and RISCV64, ONLY "acpi=off", "acpi=on" or

			"acpi=force" are available

			nospcr -- disable console in ACPI SPCR table as

				default _serial_ console on ARM64

			For ARM64, ONLY "acpi=off", "acpi=on", "acpi=force" or

			"acpi=nospcr" are available

			For RISCV64, ONLY "acpi=off", "acpi=on" or "acpi=force"

			are available



			See also Documentation/power/runtime_pm.rst, pci=noacpi

Documentation/arch/arm64/cpu-hotplug.rst

0 → 100644
+79 −0
Original line number Diff line number Diff line 
.. SPDX-License-Identifier: GPL-2.0

.. _cpuhp_index:



====================

CPU Hotplug and ACPI

====================



CPU hotplug in the arm64 world is commonly used to describe the kernel taking

CPUs online/offline using PSCI. This document is about ACPI firmware allowing

CPUs that were not available during boot to be added to the system later.



``possible`` and ``present`` refer to the state of the CPU as seen by linux.





CPU Hotplug on physical systems - CPUs not present at boot

----------------------------------------------------------



Physical systems need to mark a CPU that is ``possible`` but not ``present`` as

being ``present``. An example would be a dual socket machine, where the package

in one of the sockets can be replaced while the system is running.



This is not supported.



In the arm64 world CPUs are not a single device but a slice of the system.

There are no systems that support the physical addition (or removal) of CPUs

while the system is running, and ACPI is not able to sufficiently describe

them.



e.g. New CPUs come with new caches, but the platform's cache toplogy is

described in a static table, the PPTT. How caches are shared between CPUs is

not discoverable, and must be described by firmware.



e.g. The GIC redistributor for each CPU must be accessed by the driver during

boot to discover the system wide supported features. ACPI's MADT GICC

structures can describe a redistributor associated with a disabled CPU, but

can't describe whether the redistributor is accessible, only that it is not

'always on'.



arm64's ACPI tables assume that everything described is ``present``.





CPU Hotplug on virtual systems - CPUs not enabled at boot

---------------------------------------------------------



Virtual systems have the advantage that all the properties the system will

ever have can be described at boot. There are no power-domain considerations

as such devices are emulated.



CPU Hotplug on virtual systems is supported. It is distinct from physical

CPU Hotplug as all resources are described as ``present``, but CPUs may be

marked as disabled by firmware. Only the CPU's online/offline behaviour is

influenced by firmware. An example is where a virtual machine boots with a

single CPU, and additional CPUs are added once a cloud orchestrator deploys

the workload.



For a virtual machine, the VMM (e.g. Qemu) plays the part of firmware.



Virtual hotplug is implemented as a firmware policy affecting which CPUs can be

brought online. Firmware can enforce its policy via PSCI's return codes. e.g.

``DENIED``.



The ACPI tables must describe all the resources of the virtual machine. CPUs

that firmware wishes to disable either from boot (or later) should not be

``enabled`` in the MADT GICC structures, but should have the ``online capable``

bit set, to indicate they can be enabled later. The boot CPU must be marked as

``enabled``.  The 'always on' GICR structure must be used to describe the

redistributors.



CPUs described as ``online capable`` but not ``enabled`` can be set to enabled

by the DSDT's Processor object's _STA method. On virtual systems the _STA method

must always report the CPU as ``present``. Changes to the firmware policy can

be notified to the OS via device-check or eject-request.



CPUs described as ``enabled`` in the static table, should not have their _STA

modified dynamically by firmware. Soft-restart features such as kexec will

re-read the static properties of the system from these static tables, and

may malfunction if these no longer describe the running system. Linux will

re-discover the dynamic properties of the system from the _STA method later

during boot.

Documentation/arch/arm64/index.rst

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ ARM64 Architecture 
    asymmetric-32bit

    booting

    cpu-feature-registers

    cpu-hotplug

    elf_hwcaps

    hugetlbpage

    kdump

Documentation/arch/arm64/memory.rst

+20 −22
Original line number Diff line number Diff line
@@ -18,12 +18,10 @@ ARMv8.2 adds optional support for Large Virtual Address space. This is 
only available when running with a 64KB page size and expands the

number of descriptors in the first level of translation.



User addresses have bits 63:48 set to 0 while the kernel addresses have

the same bits set to 1. TTBRx selection is given by bit 63 of the

virtual address. The swapper_pg_dir contains only kernel (global)

mappings while the user pgd contains only user (non-global) mappings.

The swapper_pg_dir address is written to TTBR1 and never written to

TTBR0.

TTBRx selection is given by bit 55 of the virtual address. The

swapper_pg_dir contains only kernel (global) mappings while the user pgd

contains only user (non-global) mappings.  The swapper_pg_dir address is

written to TTBR1 and never written to TTBR0.





AArch64 Linux memory layout with 4KB pages + 4 levels (48-bit)::
@@ -72,7 +70,7 @@ Translation table lookup with 4KB pages:: 
            |        |         |         +-----------> [29:21] L2 index

            |        |         +---------------------> [38:30] L1 index

            |        +-------------------------------> [47:39] L0 index

   +-------------------------------------------------> [63] TTBR0/1

            +----------------------------------------> [55] TTBR0/1





Translation table lookup with 64KB pages::
@@ -87,7 +85,7 @@ Translation table lookup with 64KB pages:: 
            |        |    +--------------------------> [41:29] L2 index

            |        +-------------------------------> [47:42] L1 index (48-bit)

            |                                          [51:42] L1 index (52-bit)

   +-------------------------------------------------> [63] TTBR0/1

            +----------------------------------------> [55] TTBR0/1





When using KVM without the Virtualization Host Extensions, the