Commit c9543cca authored by Wesley Cheng's avatar Wesley Cheng Committed by Vinod Koul
Browse files

phy: qualcomm: Update the QMP clamp register for V6 



QMP combo phy V6 and above use the clamp register from the PCS always on
(AON) address space.  Update the driver accordingly.

Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: default avatarElson Roy Serrao <quic_eserrao@quicinc.com>
Signed-off-by: default avatarWesley Cheng <wesley.cheng@oss.qualcomm.com>
Reviewed-by: default avatarAbel Vesa <abel.vesa@linaro.org>
Link: https://patch.msgid.link/20251209-linux-next-12825-v8-7-42133596bda0@oss.qualcomm.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 7dbba9fb

drivers/phy/qualcomm/phy-qcom-qmp-combo.c

+33 −5
Original line number Diff line number Diff line
@@ -30,7 +30,10 @@ 
#include "phy-qcom-qmp-common.h"



#include "phy-qcom-qmp.h"

#include "phy-qcom-qmp-pcs-aon-v6.h"

#include "phy-qcom-qmp-pcs-misc-v3.h"

#include "phy-qcom-qmp-pcs-misc-v4.h"

#include "phy-qcom-qmp-pcs-misc-v5.h"

#include "phy-qcom-qmp-pcs-usb-v4.h"

#include "phy-qcom-qmp-pcs-usb-v5.h"

#include "phy-qcom-qmp-pcs-usb-v6.h"
@@ -79,6 +82,7 @@ enum qphy_reg_layout { 
	QPHY_PCS_AUTONOMOUS_MODE_CTRL,

	QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR,

	QPHY_PCS_POWER_DOWN_CONTROL,

	QPHY_PCS_CLAMP_ENABLE,



	QPHY_COM_RESETSM_CNTRL,

	QPHY_COM_C_READY_STATUS,
@@ -106,6 +110,8 @@ static const unsigned int qmp_v3_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { 
	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V3_PCS_AUTONOMOUS_MODE_CTRL,

	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V3_PCS_LFPS_RXTERM_IRQ_CLEAR,



	[QPHY_PCS_CLAMP_ENABLE]		= QPHY_V3_PCS_MISC_CLAMP_ENABLE,



	[QPHY_COM_RESETSM_CNTRL]	= QSERDES_V3_COM_RESETSM_CNTRL,

	[QPHY_COM_C_READY_STATUS]	= QSERDES_V3_COM_C_READY_STATUS,

	[QPHY_COM_CMN_STATUS]		= QSERDES_V3_COM_CMN_STATUS,
@@ -131,6 +137,8 @@ static const unsigned int qmp_v45_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { 
	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V4_PCS_USB3_AUTONOMOUS_MODE_CTRL,

	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V4_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,



	[QPHY_PCS_CLAMP_ENABLE]		= QPHY_V4_PCS_MISC_CLAMP_ENABLE,



	[QPHY_COM_RESETSM_CNTRL]	= QSERDES_V4_COM_RESETSM_CNTRL,

	[QPHY_COM_C_READY_STATUS]	= QSERDES_V4_COM_C_READY_STATUS,

	[QPHY_COM_CMN_STATUS]		= QSERDES_V4_COM_CMN_STATUS,
@@ -156,6 +164,8 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { 
	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,

	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,



	[QPHY_PCS_CLAMP_ENABLE]		= QPHY_V5_PCS_MISC_CLAMP_ENABLE,



	[QPHY_COM_RESETSM_CNTRL]	= QSERDES_V5_COM_RESETSM_CNTRL,

	[QPHY_COM_C_READY_STATUS]	= QSERDES_V5_COM_C_READY_STATUS,

	[QPHY_COM_CMN_STATUS]		= QSERDES_V5_COM_CMN_STATUS,
@@ -181,6 +191,8 @@ static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { 
	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL,

	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,



	[QPHY_PCS_CLAMP_ENABLE]		= QPHY_V6_PCS_AON_CLAMP_ENABLE,



	[QPHY_COM_RESETSM_CNTRL]	= QSERDES_V6_COM_RESETSM_CNTRL,

	[QPHY_COM_C_READY_STATUS]	= QSERDES_V6_COM_C_READY_STATUS,

	[QPHY_COM_CMN_STATUS]		= QSERDES_V6_COM_CMN_STATUS,
@@ -206,6 +218,8 @@ static const unsigned int qmp_v6_n4_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { 
	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL,

	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,



	[QPHY_PCS_CLAMP_ENABLE]		= QPHY_V6_PCS_AON_CLAMP_ENABLE,



	[QPHY_COM_RESETSM_CNTRL]	= QSERDES_V6_COM_RESETSM_CNTRL,

	[QPHY_COM_C_READY_STATUS]	= QSERDES_V6_COM_C_READY_STATUS,

	[QPHY_COM_CMN_STATUS]		= QSERDES_V6_COM_CMN_STATUS,
@@ -1771,6 +1785,7 @@ struct qmp_combo_offsets { 
	u16 usb3_serdes;

	u16 usb3_pcs_misc;

	u16 usb3_pcs;

	u16 usb3_pcs_aon;

	u16 usb3_pcs_usb;

	u16 dp_serdes;

	u16 dp_txa;
@@ -1852,6 +1867,7 @@ struct qmp_combo { 
	void __iomem *tx2;

	void __iomem *rx2;

	void __iomem *pcs_misc;

	void __iomem *pcs_aon;

	void __iomem *pcs_usb;



	void __iomem *dp_serdes;
@@ -1976,6 +1992,7 @@ static const struct qmp_combo_offsets qmp_combo_offsets_v8 = { 
	.usb3_serdes	= 0x1000,

	.usb3_pcs_misc	= 0x1c00,

	.usb3_pcs	= 0x1e00,

	.usb3_pcs_aon	= 0x2000,

	.usb3_pcs_usb	= 0x2100,

	.dp_serdes	= 0x3000,

	.dp_txa		= 0x3400,
@@ -3361,6 +3378,7 @@ static void qmp_combo_enable_autonomous_mode(struct qmp_combo *qmp) 
	const struct qmp_phy_cfg *cfg = qmp->cfg;

	void __iomem *pcs_usb = qmp->pcs_usb ?: qmp->pcs;

	void __iomem *pcs_misc = qmp->pcs_misc;

	void __iomem *pcs_aon = qmp->pcs_aon;

	u32 intr_mask;



	if (qmp->phy_mode == PHY_MODE_USB_HOST_SS ||
@@ -3380,9 +3398,14 @@ static void qmp_combo_enable_autonomous_mode(struct qmp_combo *qmp) 
	/* Enable required PHY autonomous mode interrupts */

	qphy_setbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], intr_mask);



	/* Enable i/o clamp_n for autonomous mode */

	if (pcs_misc)

		qphy_clrbits(pcs_misc, QPHY_V3_PCS_MISC_CLAMP_ENABLE, CLAMP_EN);

	/*

	 * Enable i/o clamp_n for autonomous mode

	 * V6 and later versions use pcs aon clamp register

	 */

	if (pcs_aon)

		qphy_clrbits(pcs_aon, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);

	else if (pcs_misc)

		qphy_clrbits(pcs_misc, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);

}



static void qmp_combo_disable_autonomous_mode(struct qmp_combo *qmp)
@@ -3390,10 +3413,13 @@ static void qmp_combo_disable_autonomous_mode(struct qmp_combo *qmp) 
	const struct qmp_phy_cfg *cfg = qmp->cfg;

	void __iomem *pcs_usb = qmp->pcs_usb ?: qmp->pcs;

	void __iomem *pcs_misc = qmp->pcs_misc;

	void __iomem *pcs_aon = qmp->pcs_aon;



	/* Disable i/o clamp_n on resume for normal mode */

	if (pcs_misc)

		qphy_setbits(pcs_misc, QPHY_V3_PCS_MISC_CLAMP_ENABLE, CLAMP_EN);

	if (pcs_aon)

		qphy_setbits(pcs_aon, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);

	else if (pcs_misc)

		qphy_setbits(pcs_misc, cfg->regs[QPHY_PCS_CLAMP_ENABLE], CLAMP_EN);



	qphy_clrbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL],

		     ARCVR_DTCT_EN | ARCVR_DTCT_EVENT_SEL | ALFPS_DTCT_EN);
@@ -4058,6 +4084,8 @@ static int qmp_combo_parse_dt(struct qmp_combo *qmp) 
	qmp->serdes = base + offs->usb3_serdes;

	qmp->pcs_misc = base + offs->usb3_pcs_misc;

	qmp->pcs = base + offs->usb3_pcs;

	if (offs->usb3_pcs_aon)

		qmp->pcs_aon = base + offs->usb3_pcs_aon;

	qmp->pcs_usb = base + offs->usb3_pcs_usb;



	qmp->dp_serdes = base + offs->dp_serdes;

drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v6.h

0 → 100644
+12 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.

 */



#ifndef QCOM_PHY_QMP_PCS_AON_V6_H_

#define QCOM_PHY_QMP_PCS_AON_V6_H_



/* Only for QMP V6 PHY - PCS_AON registers */

#define QPHY_V6_PCS_AON_CLAMP_ENABLE			0x00



#endif

drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v5.h

0 → 100644
+12 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.

 */



#ifndef QCOM_PHY_QMP_PCS_MISC_V5_H_

#define QCOM_PHY_QMP_PCS_MISC_V5_H_



/* Only for QMP V5 PHY - PCS_MISC registers */

#define QPHY_V5_PCS_MISC_CLAMP_ENABLE			0x0c



#endif