Commit c9577190 authored by Arnaud Vrac's avatar Arnaud Vrac Committed by Dmitry Baryshkov
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drm/msm/dpu: fix cursor block register bit offset in msm8998 hw catalog 



This matches the value for both fbdev and sde implementations in the
downstream msm-4.4 repository.

Signed-off-by: default avatarArnaud Vrac <avrac@freebox.fr>
Fixes: 94391a14 ("drm/msm/dpu1: Add MSM8998 to hw catalog")
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/532899/
Link: https://lore.kernel.org/r/20230419-dpu-tweaks-v1-8-d1bac46db075@freebox.fr


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 95a80832

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h

+2 −2
Original line number Diff line number Diff line
@@ -39,8 +39,8 @@ static const struct dpu_mdp_cfg msm8998_mdp[] = { 
	.clk_ctrls[DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },

	.clk_ctrls[DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 },

	.clk_ctrls[DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 12 },

	.clk_ctrls[DPU_CLK_CTRL_CURSOR0] = { .reg_off = 0x3a8, .bit_off = 15 },

	.clk_ctrls[DPU_CLK_CTRL_CURSOR1] = { .reg_off = 0x3b0, .bit_off = 15 },

	.clk_ctrls[DPU_CLK_CTRL_CURSOR0] = { .reg_off = 0x3a8, .bit_off = 16 },

	.clk_ctrls[DPU_CLK_CTRL_CURSOR1] = { .reg_off = 0x3b0, .bit_off = 16 },

	},

};