Commit c9a9fc23 authored by Aleksa Paunovic's avatar Aleksa Paunovic Committed by Paul Walmsley
Browse files

riscv: hwprobe: Document MIPS xmipsexectl vendor extension 



Document support for MIPS vendor extensions using the key
"RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0" and xmipsexectl vendor extension
using the key "RISCV_HWPROBE_VENDOR_EXT_XMIPSEXECTL".

Signed-off-by: default avatarAleksa Paunovic <aleksa.paunovic@htecgroup.com>
Reviewed-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250724-p8700-pause-v5-5-a6cbbe1c3412@htecgroup.com


Signed-off-by: default avatarPaul Walmsley <pjw@kernel.org>
parent bb4b0f8a

Documentation/arch/riscv/hwprobe.rst

+9 −0
Original line number Diff line number Diff line
@@ -327,6 +327,15 @@ The following keys are defined: 
  * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED`: Misaligned vector accesses are

    not supported at all and will generate a misaligned address fault.



* :c:macro:`RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0`: A bitmask containing the

  mips vendor extensions that are compatible with the

  :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior.



  * MIPS



    * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XMIPSEXECTL`: The xmipsexectl vendor

        extension is supported in the MIPS ISA extensions spec.



* :c:macro:`RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0`: A bitmask containing the

  thead vendor extensions that are compatible with the

  :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior.