Commit ca33cd27 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin Committed by Lucas De Marchi
Browse files

drm/xe/xelp: Add Wa_18022495364 



Add Wa_18022495364 as a context workaround batch buffer workaround.

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20250711160153.49833-9-tvrtko.ursulin@igalia.com


Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
parent e8372ede

drivers/gpu/drm/xe/regs/xe_engine_regs.h

+3 −0
Original line number Diff line number Diff line
@@ -111,6 +111,9 @@ 
#define   PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS	REG_BIT(14)

#define   CS_PRIORITY_MEM_READ			REG_BIT(7)



#define CS_DEBUG_MODE2(base)			XE_REG((base) + 0xd8, XE_REG_OPTION_MASKED)

#define   INSTRUCTION_STATE_CACHE_INVALIDATE	REG_BIT(6)



#define FF_SLICE_CS_CHICKEN1(base)		XE_REG((base) + 0xe0, XE_REG_OPTION_MASKED)

#define   FFSC_PERCTX_PREEMPT_CTRL		REG_BIT(14)

drivers/gpu/drm/xe/xe_lrc.c

+21 −0
Original line number Diff line number Diff line
@@ -1056,6 +1056,26 @@ static ssize_t setup_timestamp_wa(struct xe_lrc *lrc, struct xe_hw_engine *hwe, 
	return cmd - batch;

}



static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,

					       struct xe_hw_engine *hwe,

					       u32 *batch, size_t max_len)

{

	u32 *cmd = batch;



	if (!XE_WA(lrc->gt, 18022495364) ||

	    hwe->class != XE_ENGINE_CLASS_RENDER)

		return 0;



	if (xe_gt_WARN_ON(lrc->gt, max_len < 3))

		return -ENOSPC;



	*cmd++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1);

	*cmd++ = CS_DEBUG_MODE1(0).addr;

	*cmd++ = _MASKED_BIT_ENABLE(INSTRUCTION_STATE_CACHE_INVALIDATE);



	return cmd - batch;

}



struct bo_setup {

	ssize_t (*setup)(struct xe_lrc *lrc, struct xe_hw_engine *hwe,

			 u32 *batch, size_t max_size);
@@ -1132,6 +1152,7 @@ static int setup_wa_bb(struct xe_lrc *lrc, struct xe_hw_engine *hwe) 
{

	static const struct bo_setup funcs[] = {

		{ .setup = setup_timestamp_wa },

		{ .setup = setup_invalidate_state_cache_wa },

		{ .setup = setup_utilization_wa },

	};

	struct bo_setup_state state = {

drivers/gpu/drm/xe/xe_wa_oob.rules

+1 −0
Original line number Diff line number Diff line 
1607983814	GRAPHICS_VERSION_RANGE(1200, 1210)

16010904313	GRAPHICS_VERSION_RANGE(1200, 1210)

18022495364	GRAPHICS_VERSION_RANGE(1200, 1210)

22012773006	GRAPHICS_VERSION_RANGE(1200, 1250)

14014475959	GRAPHICS_VERSION_RANGE(1270, 1271), GRAPHICS_STEP(A0, B0)

		PLATFORM(DG2)