Unverified Commit ca592e20 authored by Shengjiu Wang's avatar Shengjiu Wang Committed by Mark Brown
Browse files

ASoC: fsl_xcvr: get channel status data when PHY is not exists 



There is no PHY for the XCVR module on i.MX93, the channel status needs
to be obtained from FSL_XCVR_RX_CS_DATA_* registers. And channel status
acknowledge (CSA) bit should be set once channel status is processed.

Fixes: e240b932 ("ASoC: fsl_xcvr: Add support for i.MX93 platform")
Signed-off-by: default avatarShengjiu Wang <shengjiu.wang@nxp.com>
Link: https://patch.msgid.link/20250710030405.3370671-2-shengjiu.wang@nxp.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent c58c35ef

sound/soc/fsl/fsl_xcvr.c

+20 −0
Original line number Diff line number Diff line
@@ -1423,6 +1423,26 @@ static irqreturn_t irq0_isr(int irq, void *devid) 
				/* clear CS control register */

				memset_io(reg_ctrl, 0, sizeof(val));

			}

		} else {

			regmap_read(xcvr->regmap, FSL_XCVR_RX_CS_DATA_0,

				    (u32 *)&xcvr->rx_iec958.status[0]);

			regmap_read(xcvr->regmap, FSL_XCVR_RX_CS_DATA_1,

				    (u32 *)&xcvr->rx_iec958.status[4]);

			regmap_read(xcvr->regmap, FSL_XCVR_RX_CS_DATA_2,

				    (u32 *)&xcvr->rx_iec958.status[8]);

			regmap_read(xcvr->regmap, FSL_XCVR_RX_CS_DATA_3,

				    (u32 *)&xcvr->rx_iec958.status[12]);

			regmap_read(xcvr->regmap, FSL_XCVR_RX_CS_DATA_4,

				    (u32 *)&xcvr->rx_iec958.status[16]);

			regmap_read(xcvr->regmap, FSL_XCVR_RX_CS_DATA_5,

				    (u32 *)&xcvr->rx_iec958.status[20]);

			for (i = 0; i < 6; i++) {

				val = *(u32 *)(xcvr->rx_iec958.status + i * 4);

				*(u32 *)(xcvr->rx_iec958.status + i * 4) =

					bitrev32(val);

			}

			regmap_set_bits(xcvr->regmap, FSL_XCVR_RX_DPTH_CTRL,

					FSL_XCVR_RX_DPTH_CTRL_CSA);

		}

	}

	if (isr & FSL_XCVR_IRQ_NEW_UD) {