Commit ca5b0b71 authored by Samuel Holland's avatar Samuel Holland Committed by Thomas Gleixner
Browse files

irqchip/riscv-intc: Fix use of AIA interrupts 32-63 on riscv32 



riscv_intc_custom_base is initialized to BITS_PER_LONG, so the second
check passes even though AIA provides 64 interrupts. Adjust the condition to
only check the custom range for interrupts outside the standard range, and
adjust the standard range when AIA is available.

Fixes: 3c46fc5b ("irqchip/riscv-intc: Add support for RISC-V AIA")
Fixes: 678c607e ("irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA")
Signed-off-by: default avatarSamuel Holland <samuel.holland@sifive.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20240312212813.2323841-1-samuel.holland@sifive.com
parent 4527e837

drivers/irqchip/irq-riscv-intc.c

+8 −5
Original line number Diff line number Diff line
@@ -149,8 +149,9 @@ static int riscv_intc_domain_alloc(struct irq_domain *domain, 
	 * Only allow hwirq for which we have corresponding standard or

	 * custom interrupt enable register.

	 */

	if ((hwirq >= riscv_intc_nr_irqs && hwirq < riscv_intc_custom_base) ||

	    (hwirq >= riscv_intc_custom_base + riscv_intc_custom_nr_irqs))

	if (hwirq >= riscv_intc_nr_irqs &&

	    (hwirq < riscv_intc_custom_base ||

	     hwirq >= riscv_intc_custom_base + riscv_intc_custom_nr_irqs))

		return -EINVAL;



	for (i = 0; i < nr_irqs; i++) {
@@ -183,10 +184,12 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn, struct irq_ch 
		return -ENXIO;

	}



	if (riscv_isa_extension_available(NULL, SxAIA))

	if (riscv_isa_extension_available(NULL, SxAIA)) {

		riscv_intc_nr_irqs = 64;

		rc = set_handle_irq(&riscv_intc_aia_irq);

	else

	} else {

		rc = set_handle_irq(&riscv_intc_irq);

	}

	if (rc) {

		pr_err("failed to set irq handler\n");

		return rc;
@@ -195,7 +198,7 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn, struct irq_ch 
	riscv_set_intc_hwnode_fn(riscv_intc_hwnode);



	pr_info("%d local interrupts mapped%s\n",

		riscv_isa_extension_available(NULL, SxAIA) ? 64 : riscv_intc_nr_irqs,

		riscv_intc_nr_irqs,

		riscv_isa_extension_available(NULL, SxAIA) ? " using AIA" : "");

	if (riscv_intc_custom_nr_irqs)

		pr_info("%d custom local interrupts mapped\n", riscv_intc_custom_nr_irqs);