Commit ca75e4b2 authored by xianwei.zhao's avatar xianwei.zhao Committed by Ulf Hansson
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pmdomain: amlogic: Add support for T7 power domains controller



Add support for T7 power controller. T7 power control
registers are in secure domain, and should be accessed by SMC.

Signed-off-by: default avatarxianwei.zhao <xianwei.zhao@amlogic.com>
Reviewed-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230911025223.3433776-6-xianwei.zhao@amlogic.com


[Ulf: Re-based to fit the pmdomain subsystem]
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 0a7bd33c
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+73 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@
#include <dt-bindings/power/meson-a1-power.h>
#include <dt-bindings/power/amlogic,c3-pwrc.h>
#include <dt-bindings/power/meson-s4-power.h>
#include <dt-bindings/power/amlogic,t7-pwrc.h>
#include <linux/arm-smccc.h>
#include <linux/firmware/meson/meson_sm.h>
#include <linux/module.h>
@@ -164,6 +165,69 @@ static struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] = {
	SEC_PD(S4_AUDIO,	0),
};

static struct meson_secure_pwrc_domain_desc t7_pwrc_domains[] = {
	SEC_PD(T7_DSPA,		0),
	SEC_PD(T7_DSPB,		0),
	TOP_PD(T7_DOS_HCODEC,	0, PWRC_T7_NIC3_ID),
	TOP_PD(T7_DOS_HEVC,	0, PWRC_T7_NIC3_ID),
	TOP_PD(T7_DOS_VDEC,	0, PWRC_T7_NIC3_ID),
	TOP_PD(T7_DOS_WAVE,	0, PWRC_T7_NIC3_ID),
	SEC_PD(T7_VPU_HDMI,	0),
	SEC_PD(T7_USB_COMB,	0),
	SEC_PD(T7_PCIE,		0),
	TOP_PD(T7_GE2D,		0, PWRC_T7_NIC3_ID),
	/* SRAMA is used as ATF runtime memory, and should be always on */
	SEC_PD(T7_SRAMA,	GENPD_FLAG_ALWAYS_ON),
	/* SRAMB is used as ATF runtime memory, and should be always on */
	SEC_PD(T7_SRAMB,	GENPD_FLAG_ALWAYS_ON),
	SEC_PD(T7_HDMIRX,	0),
	SEC_PD(T7_VI_CLK1,	0),
	SEC_PD(T7_VI_CLK2,	0),
	/* ETH is for ethernet online wakeup, and should be always on */
	SEC_PD(T7_ETH,		GENPD_FLAG_ALWAYS_ON),
	SEC_PD(T7_ISP,		0),
	SEC_PD(T7_MIPI_ISP,	0),
	TOP_PD(T7_GDC,		0, PWRC_T7_NIC3_ID),
	TOP_PD(T7_DEWARP,	0, PWRC_T7_NIC3_ID),
	SEC_PD(T7_SDIO_A,	0),
	SEC_PD(T7_SDIO_B,	0),
	SEC_PD(T7_EMMC,		0),
	TOP_PD(T7_MALI_SC0,	0, PWRC_T7_NNA_TOP_ID),
	TOP_PD(T7_MALI_SC1,	0, PWRC_T7_NNA_TOP_ID),
	TOP_PD(T7_MALI_SC2,	0, PWRC_T7_NNA_TOP_ID),
	TOP_PD(T7_MALI_SC3,	0, PWRC_T7_NNA_TOP_ID),
	SEC_PD(T7_MALI_TOP,	0),
	TOP_PD(T7_NNA_CORE0,	0, PWRC_T7_NNA_TOP_ID),
	TOP_PD(T7_NNA_CORE1,	0, PWRC_T7_NNA_TOP_ID),
	TOP_PD(T7_NNA_CORE2,	0, PWRC_T7_NNA_TOP_ID),
	TOP_PD(T7_NNA_CORE3,	0, PWRC_T7_NNA_TOP_ID),
	SEC_PD(T7_NNA_TOP,	0),
	SEC_PD(T7_DDR0,		GENPD_FLAG_ALWAYS_ON),
	SEC_PD(T7_DDR1,		GENPD_FLAG_ALWAYS_ON),
	/* DMC0 is for DDR PHY ana/dig and DMC, and should be always on */
	SEC_PD(T7_DMC0,		GENPD_FLAG_ALWAYS_ON),
	/* DMC1 is for DDR PHY ana/dig and DMC, and should be always on */
	SEC_PD(T7_DMC1,		GENPD_FLAG_ALWAYS_ON),
	/* NOC is related to clk bus, and should be always on */
	SEC_PD(T7_NOC,		GENPD_FLAG_ALWAYS_ON),
	/* NIC is for the Arm NIC-400 interconnect, and should be always on */
	SEC_PD(T7_NIC2,		GENPD_FLAG_ALWAYS_ON),
	SEC_PD(T7_NIC3,		0),
	/* CPU accesses the interleave data to the ddr need cci, and should be always on */
	SEC_PD(T7_CCI,		GENPD_FLAG_ALWAYS_ON),
	SEC_PD(T7_MIPI_DSI0,	0),
	SEC_PD(T7_SPICC0,	0),
	SEC_PD(T7_SPICC1,	0),
	SEC_PD(T7_SPICC2,	0),
	SEC_PD(T7_SPICC3,	0),
	SEC_PD(T7_SPICC4,	0),
	SEC_PD(T7_SPICC5,	0),
	SEC_PD(T7_EDP0,		0),
	SEC_PD(T7_EDP1,		0),
	SEC_PD(T7_MIPI_DSI1,	0),
	SEC_PD(T7_AUDIO,	0),
};

static int meson_secure_pwrc_probe(struct platform_device *pdev)
{
	int i;
@@ -257,6 +321,11 @@ static struct meson_secure_pwrc_domain_data meson_secure_s4_pwrc_data = {
	.count = ARRAY_SIZE(s4_pwrc_domains),
};

static struct meson_secure_pwrc_domain_data amlogic_secure_t7_pwrc_data = {
	.domains = t7_pwrc_domains,
	.count = ARRAY_SIZE(t7_pwrc_domains),
};

static const struct of_device_id meson_secure_pwrc_match_table[] = {
	{
		.compatible = "amlogic,meson-a1-pwrc",
@@ -270,6 +339,10 @@ static const struct of_device_id meson_secure_pwrc_match_table[] = {
		.compatible = "amlogic,meson-s4-pwrc",
		.data = &meson_secure_s4_pwrc_data,
	},
	{
		.compatible = "amlogic,t7-pwrc",
		.data = &amlogic_secure_t7_pwrc_data,
	},
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, meson_secure_pwrc_match_table);