Commit ca8c1fd3 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: split _dpu_encoder_resource_control_helper() 



Follow the _dpu_encoder_irq_control() change and split the
_dpu_encoder_resource_control_helper() into enable and disable parts.

Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/577525/
Link: https://lore.kernel.org/r/20240208-fd_remove_phys_ops_atomic_mode_set-v4-2-caf5dcd125c0@linaro.org
parent c6f60037

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

+29 −16
Original line number Diff line number Diff line
@@ -761,8 +761,7 @@ static void _dpu_encoder_irq_disable(struct drm_encoder *drm_enc) 
	}

}



static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc,

		bool enable)

static void _dpu_encoder_resource_enable(struct drm_encoder *drm_enc)

{

	struct msm_drm_private *priv;

	struct dpu_kms *dpu_kms;
@@ -772,21 +771,37 @@ static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc, 
	priv = drm_enc->dev->dev_private;

	dpu_kms = to_dpu_kms(priv->kms);



	trace_dpu_enc_rc_helper(DRMID(drm_enc), enable);

	trace_dpu_enc_rc_enable(DRMID(drm_enc));



	if (!dpu_enc->cur_master) {

		DPU_ERROR("encoder master not set\n");

		return;

	}



	if (enable) {

	/* enable DPU core clks */

	pm_runtime_get_sync(&dpu_kms->pdev->dev);



	/* enable all the irq */

	_dpu_encoder_irq_enable(drm_enc);

}



static void _dpu_encoder_resource_disable(struct drm_encoder *drm_enc)

{

	struct msm_drm_private *priv;

	struct dpu_kms *dpu_kms;

	struct dpu_encoder_virt *dpu_enc;



	dpu_enc = to_dpu_encoder_virt(drm_enc);

	priv = drm_enc->dev->dev_private;

	dpu_kms = to_dpu_kms(priv->kms);



	trace_dpu_enc_rc_disable(DRMID(drm_enc));



	if (!dpu_enc->cur_master) {

		DPU_ERROR("encoder master not set\n");

		return;

	}



	} else {

	/* disable all the irq */

	_dpu_encoder_irq_disable(drm_enc);
@@ -794,8 +809,6 @@ static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc, 
	pm_runtime_put_sync(&dpu_kms->pdev->dev);

}



}



static int dpu_encoder_resource_control(struct drm_encoder *drm_enc,

		u32 sw_event)

{
@@ -851,7 +864,7 @@ static int dpu_encoder_resource_control(struct drm_encoder *drm_enc, 
		if (is_vid_mode && dpu_enc->rc_state == DPU_ENC_RC_STATE_IDLE)

			_dpu_encoder_irq_enable(drm_enc);

		else

			_dpu_encoder_resource_control_helper(drm_enc, true);

			_dpu_encoder_resource_enable(drm_enc);



		dpu_enc->rc_state = DPU_ENC_RC_STATE_ON;
@@ -946,7 +959,7 @@ static int dpu_encoder_resource_control(struct drm_encoder *drm_enc, 
		 * and in IDLE state the resources are already disabled

		 */

		if (dpu_enc->rc_state == DPU_ENC_RC_STATE_PRE_OFF)

			_dpu_encoder_resource_control_helper(drm_enc, false);

			_dpu_encoder_resource_disable(drm_enc);



		dpu_enc->rc_state = DPU_ENC_RC_STATE_OFF;
@@ -981,7 +994,7 @@ static int dpu_encoder_resource_control(struct drm_encoder *drm_enc, 
		if (is_vid_mode)

			_dpu_encoder_irq_disable(drm_enc);

		else

			_dpu_encoder_resource_control_helper(drm_enc, false);

			_dpu_encoder_resource_disable(drm_enc);



		dpu_enc->rc_state = DPU_ENC_RC_STATE_IDLE;

drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h

+8 −4
Original line number Diff line number Diff line
@@ -273,6 +273,14 @@ DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_runtime_resume, 
	TP_PROTO(uint32_t drm_id),

	TP_ARGS(drm_id)

);

DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_rc_enable,

	TP_PROTO(uint32_t drm_id),

	TP_ARGS(drm_id)

);

DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_rc_disable,

	TP_PROTO(uint32_t drm_id),

	TP_ARGS(drm_id)

);



TRACE_EVENT(dpu_enc_enable,

	TP_PROTO(uint32_t drm_id, int hdisplay, int vdisplay),
@@ -342,10 +350,6 @@ DECLARE_EVENT_CLASS(dpu_enc_id_enable_template, 
	TP_printk("id=%u, enable=%s",

		  __entry->drm_id, __entry->enable ? "true" : "false")

);

DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_rc_helper,

	TP_PROTO(uint32_t drm_id, bool enable),

	TP_ARGS(drm_id, enable)

);

DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_vblank_cb,

	TP_PROTO(uint32_t drm_id, bool enable),

	TP_ARGS(drm_id, enable)