Commit caa9f483 authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher
Browse files

drm/amdgpu: move get_invalidate_req function into gfxhub/mmhub level 



This patch is to move get_invalidate_req into gfxhub/mmhub level. It will avoid
mismatch of the different gfxhub/mmhub register offsets and fields in the same
gmc block.

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2577db91

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h

+1 −0
Original line number Diff line number Diff line
@@ -77,6 +77,7 @@ struct amdgpu_gmc_fault { 
struct amdgpu_vmhub_funcs {

	void (*print_l2_protection_fault_status)(struct amdgpu_device *adev,

						 uint32_t status);

	uint32_t (*get_invalidate_req)(unsigned int vmid, uint32_t flush_type);

};



struct amdgpu_vmhub {

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c

+21 −0
Original line number Diff line number Diff line
@@ -31,6 +31,26 @@ 


#include "soc15_common.h"



static uint32_t gfxhub_v2_0_get_invalidate_req(unsigned int vmid,

					       uint32_t flush_type)

{

	u32 req = 0;



	/* invalidate using legacy mode on vmid*/

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ,

			    PER_VMID_INVALIDATE_REQ, 1 << vmid);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PTES, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE0, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE1, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE2, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L1_PTES, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ,

			    CLEAR_PROTECTION_FAULT_STATUS_ADDR,	0);



	return req;

}



static void

gfxhub_v2_0_print_l2_protection_fault_status(struct amdgpu_device *adev,

					     uint32_t status)
@@ -389,6 +409,7 @@ void gfxhub_v2_0_set_fault_enable_default(struct amdgpu_device *adev, 


static const struct amdgpu_vmhub_funcs gfxhub_v2_0_vmhub_funcs = {

	.print_l2_protection_fault_status = gfxhub_v2_0_print_l2_protection_fault_status,

	.get_invalidate_req = gfxhub_v2_0_get_invalidate_req,

};



void gfxhub_v2_0_init(struct amdgpu_device *adev)

drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c

+21 −0
Original line number Diff line number Diff line
@@ -31,6 +31,26 @@ 


#include "soc15_common.h"



static uint32_t gfxhub_v2_1_get_invalidate_req(unsigned int vmid,

					       uint32_t flush_type)

{

	u32 req = 0;



	/* invalidate using legacy mode on vmid*/

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ,

			    PER_VMID_INVALIDATE_REQ, 1 << vmid);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PTES, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE0, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE1, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE2, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L1_PTES, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ,

			    CLEAR_PROTECTION_FAULT_STATUS_ADDR,	0);



	return req;

}



static void

gfxhub_v2_1_print_l2_protection_fault_status(struct amdgpu_device *adev,

					     uint32_t status)
@@ -388,6 +408,7 @@ void gfxhub_v2_1_set_fault_enable_default(struct amdgpu_device *adev, 


static const struct amdgpu_vmhub_funcs gfxhub_v2_1_vmhub_funcs = {

	.print_l2_protection_fault_status = gfxhub_v2_1_print_l2_protection_fault_status,

	.get_invalidate_req = gfxhub_v2_1_get_invalidate_req,

};



void gfxhub_v2_1_init(struct amdgpu_device *adev)

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

+3 −23
Original line number Diff line number Diff line
@@ -139,26 +139,6 @@ static void gmc_v10_0_set_irq_funcs(struct amdgpu_device *adev) 
	adev->gmc.vm_fault.funcs = &gmc_v10_0_irq_funcs;

}



static uint32_t gmc_v10_0_get_invalidate_req(unsigned int vmid,

					     uint32_t flush_type)

{

	u32 req = 0;



	/* invalidate using legacy mode on vmid*/

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ,

			    PER_VMID_INVALIDATE_REQ, 1 << vmid);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PTES, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE0, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE1, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE2, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ, INVALIDATE_L1_PTES, 1);

	req = REG_SET_FIELD(req, GCVM_INVALIDATE_ENG0_REQ,

			    CLEAR_PROTECTION_FAULT_STATUS_ADDR,	0);



	return req;

}



/**

 * gmc_v10_0_use_invalidate_semaphore - judge whether to use semaphore

 *
@@ -199,7 +179,7 @@ static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid, 
{

	bool use_semaphore = gmc_v10_0_use_invalidate_semaphore(adev, vmhub);

	struct amdgpu_vmhub *hub = &adev->vmhub[vmhub];

	u32 inv_req = gmc_v10_0_get_invalidate_req(vmid, flush_type);

	u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type);

	u32 tmp;

	/* Use register 17 for GART */

	const unsigned eng = 17;
@@ -294,7 +274,7 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, 


		struct amdgpu_vmhub *hub = &adev->vmhub[vmhub];

		const unsigned eng = 17;

		u32 inv_req = gmc_v10_0_get_invalidate_req(vmid, flush_type);

		u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type);

		u32 req = hub->vm_inv_eng0_req + hub->eng_distance * eng;

		u32 ack = hub->vm_inv_eng0_ack + hub->eng_distance * eng;
@@ -425,7 +405,7 @@ static uint64_t gmc_v10_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, 
{

	bool use_semaphore = gmc_v10_0_use_invalidate_semaphore(ring->adev, ring->funcs->vmhub);

	struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];

	uint32_t req = gmc_v10_0_get_invalidate_req(vmid, 0);

	uint32_t req = hub->vmhub_funcs->get_invalidate_req(vmid, 0);

	unsigned eng = ring->vm_inv_eng;



	/*

drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

+21 −0
Original line number Diff line number Diff line
@@ -36,6 +36,26 @@ 
#define mmDAGB0_CNTL_MISC2_Sienna_Cichlid                       0x0070

#define mmDAGB0_CNTL_MISC2_Sienna_Cichlid_BASE_IDX              0



static uint32_t mmhub_v2_0_get_invalidate_req(unsigned int vmid,

					      uint32_t flush_type)

{

	u32 req = 0;



	/* invalidate using legacy mode on vmid*/

	req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ,

			    PER_VMID_INVALIDATE_REQ, 1 << vmid);

	req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type);

	req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PTES, 1);

	req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE0, 1);

	req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE1, 1);

	req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE2, 1);

	req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, INVALIDATE_L1_PTES, 1);

	req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ,

			    CLEAR_PROTECTION_FAULT_STATUS_ADDR,	0);



	return req;

}



static void

mmhub_v2_0_print_l2_protection_fault_status(struct amdgpu_device *adev,

					     uint32_t status)
@@ -380,6 +400,7 @@ void mmhub_v2_0_set_fault_enable_default(struct amdgpu_device *adev, bool value) 


static const struct amdgpu_vmhub_funcs mmhub_v2_0_vmhub_funcs = {

	.print_l2_protection_fault_status = mmhub_v2_0_print_l2_protection_fault_status,

	.get_invalidate_req = mmhub_v2_0_get_invalidate_req,

};



void mmhub_v2_0_init(struct amdgpu_device *adev)