dt-bindings: mmc: sdhci-sprd: convert to YAML

* Spreadtrum SDHCI controller (sdhci-sprd)

The Secure Digital (SD) Host controller on Spreadtrum SoCs provides an interface

for MMC, SD and SDIO types of cards.

This file documents differences between the core properties in mmc.txt

and the properties used by the sdhci-sprd driver.

Required properties:

- compatible: Should contain "sprd,sdhci-r11".

- reg: physical base address of the controller and length.

- interrupts: Interrupts used by the SDHCI controller.

- clocks: Should contain phandle for the clock feeding the SDHCI controller

- clock-names: Should contain the following:

	"sdio" - SDIO source clock (required)

	"enable" - gate clock which used for enabling/disabling the device (required)

	"2x_enable" - gate clock controlling the device for some special platforms (optional)

Optional properties:

- assigned-clocks: the same with "sdio" clock

- assigned-clock-parents: the default parent of "sdio" clock

- pinctrl-names: should be "default", "state_uhs"

- pinctrl-0: should contain default/high speed pin control

- pinctrl-1: should contain uhs mode pin control

PHY DLL delays are used to delay the data valid window, and align the window

to sampling clock. PHY DLL delays can be configured by following properties,

and each property contains 4 cells which are used to configure the clock data

write line delay value, clock read command line delay value, clock read data

positive edge delay value and clock read data negative edge delay value.

Each cell's delay value unit is cycle of the PHY clock.

- sprd,phy-delay-legacy: Delay value for legacy timing.

- sprd,phy-delay-sd-highspeed: Delay value for SD high-speed timing.

- sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing.

- sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing.

- sprd,phy-delay-mmc-highspeed: Delay value for MMC high-speed timing.

- sprd,phy-delay-mmc-ddr52: Delay value for MMC DDR52 timing.

- sprd,phy-delay-mmc-hs200: Delay value for MMC HS200 timing.

- sprd,phy-delay-mmc-hs400: Delay value for MMC HS400 timing.

- sprd,phy-delay-mmc-hs400es: Delay value for MMC HS400 enhanced strobe timing.

Examples:

sdio0: sdio@20600000 {

	compatible  = "sprd,sdhci-r11";

	reg = <0 0x20600000 0 0x1000>;

	interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;

	clock-names = "sdio", "enable";

	clocks = <&ap_clk CLK_EMMC_2X>,

		 <&apahb_gate CLK_EMMC_EB>;

	assigned-clocks = <&ap_clk CLK_EMMC_2X>;

	assigned-clock-parents = <&rpll CLK_RPLL_390M>;

	pinctrl-names = "default", "state_uhs";

	pinctrl-0 = <&sd0_pins_default>;

	pinctrl-1 = <&sd0_pins_uhs>;

	sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>;

	bus-width = <8>;

	non-removable;

	no-sdio;

	no-sd;

	cap-mmc-hw-reset;

	status = "okay";

};

# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/mmc/sprd,sdhci-r11.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Spreadtrum SDHCI controller

maintainers:

  - Orson Zhai <orsonzhai@gmail.com>

  - Baolin Wang <baolin.wang7@gmail.com>

  - Chunyan Zhang <zhang.lyra@gmail.com>

properties:

  compatible:

    const: sprd,sdhci-r11

  reg:

    maxItems: 1

  interrupts:

    maxItems: 1

  clocks:

    minItems: 2

    items:

      - description: SDIO source clock

      - description: gate clock for enabling/disabling the device

      - description: gate clock controlling the device for some special platforms (optional)

  clock-names:

    minItems: 2

    items:

      - const: sdio

      - const: enable

      - const: 2x_enable

  pinctrl-0:

    description: default/high speed pin control

    maxItems: 1

  pinctrl-1:

    description: UHS mode pin control

    maxItems: 1

  pinctrl-names:

    minItems: 1

    items:

      - const: default

      - const: state_uhs

patternProperties:

  "^sprd,phy-delay-(legacy|mmc-(ddr52|highspeed|hs[24]00|hs400es)|sd-(highspeed|uhs-sdr(50|104)))$":

    $ref: /schemas/types.yaml#/definitions/uint32-array

    items:

      - description: clock data write line delay value

      - description: clock read command line delay value

      - description: clock read data positive edge delay value

      - description: clock read data negative edge delay value

    description:

      PHY DLL delays are used to delay the data valid window, and align

      the window to the sampling clock. Each cell's delay value unit is

      cycle of the PHY clock.

required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

allOf:

  - $ref: sdhci-common.yaml#

unevaluatedProperties: false

examples:

  - |

    #include <dt-bindings/clock/sprd,sc9860-clk.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/interrupt-controller/irq.h>

    mmc@50430000 {

      compatible = "sprd,sdhci-r11";

      reg = <0x50430000 0x1000>;

      interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;

      clocks = <&aon_prediv CLK_EMMC_2X>,

               <&apahb_gate CLK_EMMC_EB>,

               <&aon_gate CLK_EMMC_2X_EN>;

      clock-names = "sdio", "enable", "2x_enable";

      pinctrl-0 = <&sd0_pins_default>;

      pinctrl-1 = <&sd0_pins_uhs>;

      pinctrl-names = "default", "state_uhs";

      bus-width = <8>;

      cap-mmc-hw-reset;

      mmc-hs400-enhanced-strobe;

      mmc-hs400-1_8v;

      mmc-hs200-1_8v;

      mmc-ddr-1_8v;

      non-removable;

      no-sdio;

      no-sd;

      sprd,phy-delay-mmc-ddr52 = <0x3f 0x75 0x14 0x14>;

      sprd,phy-delay-mmc-hs200 = <0x0 0x8c 0x8c 0x8c>;

      sprd,phy-delay-mmc-hs400 = <0x44 0x7f 0x2e 0x2e>;

      sprd,phy-delay-mmc-hs400es = <0x3f 0x3f 0x2e 0x2e>;

    };

...