Commit cb58327c authored by Dapeng Mi's avatar Dapeng Mi Committed by Sean Christopherson
Browse files

KVM: nVMX: Add macros to simplify nested MSR interception setting 



Add macros nested_vmx_merge_msr_bitmaps_xxx() to simplify nested MSR
interception setting. No function change intended.

Suggested-by: default avatarSean Christopherson <seanjc@google.com>
Signed-off-by: default avatarDapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: default avatarMingwei Zhang <mizhang@google.com>
Tested-by: default avatarXudong Hao <xudong.hao@intel.com>
Tested-by: default avatarManali Shukla <manali.shukla@amd.com>
Link: https://patch.msgid.link/20251206001720.468579-31-seanjc@google.com


Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
parent 283a5aa5

arch/x86/kvm/vmx/nested.c

+19 −16
Original line number Diff line number Diff line
@@ -617,6 +617,19 @@ static inline void nested_vmx_set_intercept_for_msr(struct vcpu_vmx *vmx, 
						   msr_bitmap_l0, msr);

}



#define nested_vmx_merge_msr_bitmaps(msr, type)	\

	nested_vmx_set_intercept_for_msr(vmx, msr_bitmap_l1,	\

					 msr_bitmap_l0, msr, type)



#define nested_vmx_merge_msr_bitmaps_read(msr) \

	nested_vmx_merge_msr_bitmaps(msr, MSR_TYPE_R)



#define nested_vmx_merge_msr_bitmaps_write(msr) \

	nested_vmx_merge_msr_bitmaps(msr, MSR_TYPE_W)



#define nested_vmx_merge_msr_bitmaps_rw(msr) \

	nested_vmx_merge_msr_bitmaps(msr, MSR_TYPE_RW)



/*

 * Merge L0's and L1's MSR bitmap, return false to indicate that

 * we do not use the hardware.
@@ -700,23 +713,13 @@ static inline bool nested_vmx_prepare_msr_bitmap(struct kvm_vcpu *vcpu, 
	 * other runtime changes to vmcs01's bitmap, e.g. dynamic pass-through.

	 */

#ifdef CONFIG_X86_64

	nested_vmx_set_intercept_for_msr(vmx, msr_bitmap_l1, msr_bitmap_l0,

					 MSR_FS_BASE, MSR_TYPE_RW);



	nested_vmx_set_intercept_for_msr(vmx, msr_bitmap_l1, msr_bitmap_l0,

					 MSR_GS_BASE, MSR_TYPE_RW);



	nested_vmx_set_intercept_for_msr(vmx, msr_bitmap_l1, msr_bitmap_l0,

					 MSR_KERNEL_GS_BASE, MSR_TYPE_RW);

	nested_vmx_merge_msr_bitmaps_rw(MSR_FS_BASE);

	nested_vmx_merge_msr_bitmaps_rw(MSR_GS_BASE);

	nested_vmx_merge_msr_bitmaps_rw(MSR_KERNEL_GS_BASE);

#endif

	nested_vmx_set_intercept_for_msr(vmx, msr_bitmap_l1, msr_bitmap_l0,

					 MSR_IA32_SPEC_CTRL, MSR_TYPE_RW);



	nested_vmx_set_intercept_for_msr(vmx, msr_bitmap_l1, msr_bitmap_l0,

					 MSR_IA32_PRED_CMD, MSR_TYPE_W);



	nested_vmx_set_intercept_for_msr(vmx, msr_bitmap_l1, msr_bitmap_l0,

					 MSR_IA32_FLUSH_CMD, MSR_TYPE_W);

	nested_vmx_merge_msr_bitmaps_rw(MSR_IA32_SPEC_CTRL);

	nested_vmx_merge_msr_bitmaps_write(MSR_IA32_PRED_CMD);

	nested_vmx_merge_msr_bitmaps_write(MSR_IA32_FLUSH_CMD);



	nested_vmx_set_intercept_for_msr(vmx, msr_bitmap_l1, msr_bitmap_l0,

					 MSR_IA32_APERF, MSR_TYPE_R);